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Table Of Contents

NRND

LM5100, LM5101

www.ti.com

SNVS267C –MAY 2004–REVISED MARCH 2005

LM5100 /LM5101 High Voltage High Side and Low Side Gate Driver

Check for Samples: LM5100, LM5101

FEATURES

PACKAGE

• Drives Both a High Side and Low Side N-

• SOIC-8

Channel MOSFET

• WSON-10 (4 mm x 4 mm)

• Independent High and Low Driver Logic Inputs

(TTL for LM5101 or CMOS for LM5100) DESCRIPTION

The LM5100/LM5101 High Voltage Gate Drivers are

• Bootstrap Supply Voltage Range up to 118V

designed to drive both the high side and the low side

N-Channel MOSFETs in a synchronous buck or a

• Fast Propagation Times (25 ns Typical)

half bridge configuration. The floating high-side driver

• Drives 1000 pF Load with 15 ns Rise and Fall

is capable of operating with supply voltages up to

Times

100V. The outputs are independently controlled with

CMOS input thresholds (LM5100) or TTL input

• Excellent Propagation Delay Matching (3 ns

thresholds (LM5101). An integrated high voltage

Typical)

diode is provided to charge the high side gate drive

• Supply Rail Under-voltage Lockouts

bootstrap capacitor. A robust level shifter operates at

• Low Power Consumption

high speed while consuming low power and providing

clean level transitions from the control logic to the

• Pin Compatible with HIP2100/HIP2101

high side gate driver. Under-voltage lockout is

provided on both the low side and the high side

TYPICAL APPLICATIONS

power rails. This device is available in the standard

• Current Fed Push-pull Converters

SOIC-8 pin and the WSON-10 pin packages.

• Half and Full Bridge Power Converters

• Synchronous Buck Converters

• Two Switch Forward Power Converters

• Forward with Active Clamp Converters

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

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NRND LM5100, LM5101 www.ti.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.
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NRND LM5100, LM5101 www.ti.com SNVS267C – MAY 2004 – REVISED MARCH 2005 PIN DESCRIPTION (1) Pin # (1) Name Description Application Information SO-8 WSON10 1 1 VDD Positive gate drive supply Locally decouple to VSS using low ESR/ESL capacitor located as close to IC as possible. 2 2 HB High side gate driver bootstrap rail Connect the positive terminal of the bootstrap capacitor to HB and the negative terminal to HS. The Bootstrap capacitor should be place as close to IC as possible.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.com Absolute Maximum Ratings (1) (2) −0.3V to +18V VDD to VSS −0.3V to +18V VHB to VHS LI or HI Inputs −0.3V to VDD +0.3V LO Output −0.3V to VDD +0.3V HO Output VHS −0.3V to VHB +0.3V VHS to VSS −1V to +100V VHB to VSS 118V Junction Temperature +150°C −55°C to +150°C Storage Temperature Range ESD Rating HBM (3) (1) (2) (3) 2 kV Absolute Maximum Ratings indicate limits beyond which damage to the component may occur.
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NRND LM5100, LM5101 www.ti.com SNVS267C – MAY 2004 – REVISED MARCH 2005 Electrical Characteristics (continued) Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO . Symbol Parameter VDDH VDD Threshold Hysteresis VHBR HB Rising Threshold VHBH HB Threshold Hysteresis Conditions Min (1) Typ Max (1) Units 0.5 5.7 6.6 V 7.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.com Switching Characteristics (continued) Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO.
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NRND LM5100, LM5101 www.ti.com SNVS267C – MAY 2004 – REVISED MARCH 2005 Typical Performance Characteristics LM5100 IDD vs Frequency LM5101 IDD vs Frequency 100000 100000 VDD = 12V CL = 4400 pF CURRENT (PA) CL = 2200 pF 10000 CURRENT (PA) VDD = 12V CL = 4400 pF CL = 1000 pF 1000 CL = 2200 pF 10000 CL = 1000 pF 1000 100 CL = 0 pF 10 0.1 CL = 470 pF 1 10 100 CL = 0 pF CL = 470 pF 100 0.1 1000 1 100 1000 FREQUENCY (kHz) FREQUENCY (kHz) Figure 1. Figure 2.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.com Typical Performance Characteristics (continued) Undervoltage Rising Thresholds vs Temperature LM5100 Undervoltage Threshold Hysteresis vs Temperature 7.30 0.60 7.20 0.55 VDDH 7.00 VDDR HYSTERESIS (V) THRESHOLD (V) 7.10 6.90 6.80 6.70 VHBR 6.60 6.50 0.50 0.45 VHBH 0.40 0.35 6.40 6.30 -50 -25 0 25 50 0.30 -50 75 100 125 150 -25 0_ 25 50_ 75_100_125_150_ TEMPERATURE (oC) TEMPERATURE (°C) Figure 7. Figure 8.
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NRND LM5100, LM5101 www.ti.com SNVS267C – MAY 2004 – REVISED MARCH 2005 Typical Performance Characteristics (continued) LM5100 Propagation Delay vs Temperature LM5101 Propagation Delay vs Temperature 35 35 tHPHL tHPHL tLPLH 30 DELAY (ns) DELAY (ns) 30 tHPLH 25 20 tLPLH 25 tLPHL 20 tHPLH tLPHL 15 -50 -25 0 25 50 15 -50 75 100 125 150 -25 0 TEMPERATURE (°C) 25 50 75 100 125 150 TEMPERATURE (°C) Figure 13. Figure 14.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.com LAYOUT CONSIDERATIONS The optimum performance of high and low side gate drivers cannot be achieved without taking due considerations during circuit board layout. Following points are emphasized. 1. A low ESR / ESL capacitor must be connected close to the IC, and between VDD and VSS pins and between HB and HS pins to support high peak currents being drawn from VDD during turn-on of the external MOSFET. 2.
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NRND LM5100, LM5101 www.ti.com SNVS267C – MAY 2004 – REVISED MARCH 2005 The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these events happens once per cycle, the diode power loss is proportional to frequency. Larger capacitive loads require more current to recharge the bootstrap capacitor resulting in more losses.
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NRND LM5100, LM5101 SNVS267C – MAY 2004 – REVISED MARCH 2005 www.ti.com (Optional external fast recovery diode) VIN VCC RGATE HB VDD HO VDD CBOOT PWM CONTROLLER OUT1 OUT2 GND HS HI LM5101 T1 LO LI VSS Figure 19.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 30-Oct-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM5100MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM5101MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5100MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM5101MX/NOPB SOIC D 8 2500 367.0 367.0 35.
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