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LM5102

www.ti.com

SNVS268A –MAY 2004–REVISED MARCH 2013

LM5102 High Voltage Half-Bridge Gate Driver with Programmable Delay

Check for Samples: LM5102

FEATURES

DESCRIPTION

The LM5102 High Voltage Gate Driver is designed to

• Drives both a High Side and Low Side N-

drive both the high side and the low side N-Channel

Channel MOSFET

MOSFETs in a synchronous buck or a half bridge

• Independently Programmable High and Low

configuration. The floating high-side driver is capable

Side Rising Edge Delay

of working with supply voltages up to 100V. The

outputs are independently controlled. The rising edge

• Bootstrap Supply Voltage Range up to 118V

of each output can be independently delayed with a

programming resistor. An integrated high voltage

• Fast Turn-Off Propagation Delay (25 ns

diode is provided to charge the high side gate drive

Typical)

bootstrap capacitor. A robust level shifter operates at

• Drives 1000 pF Loads with 15 ns Rise and Fall

high speed while consuming low power and providing

Times

clean level transitions from control logic to the high

side gate driver. Under-voltage lockout is provided on

• Supply Rail Under-Voltage Lockout

both the low side and the high side power rails. This

• Low Power Consumption

device is available in the standard VSSOP-10 pin and

• Timer Can be Terminated Midway through

the WSON-10 pin packages.

Sequence

Packages

TYPICAL APPLICATIONS

• VSSOP-10

• Current Fed Push-Pull Power Converters

• WSON-10 (4 mm x 4 mm)

• Half and Full Bridge Power Converters

• Synchronous Buck Converters

• Two Switch Forward Power Converters

• Forward with Active Clamp Converters

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (19 pages)

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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 LM5102 High Voltage Half-Bridge Gate Driver with Programmable Delay Check for Samples: LM5102 FEATURES DESCRIPTION • The LM5102 High Voltage Gate Driver is designed to drive both the high side and the low side N-Channel MOSFETs in a synchronous buck or a half bridge configuration. The floating high-side driver is capable of working with supply voltages up to 100V. The outputs are independently controlled.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.
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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 Connection Diagram VDD 1 10 HB 2 9 VSS HO 3 8 LI HS 4 7 HI RT1 5 6 RT2 LO Figure 1. 10-Lead VSSOP, WSON PIN FUNCTIONS PIN NAME DESCRIPTION APPLICATION INFORMATION VSSOP WSON (1) 1 1 VDD Positive gate drive supply Locally decouple to VSS using low ESR/ESL capacitor, located as close to IC as possible.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) VDD to VSS –0.3V to +18V VHB to VHS –0.3V to +18V LI or HI Inputs to VSS –0.3V to VDD + 0.3V LO Output –0.3V to VDD + 0.3V HO Output VHS – 0.3V to VHB + 0.3V VHS to VSS −1V to +100V VHB to VSS 118V RT1 & RT2 to VSS –0.
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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 Electrical Characteristics (continued) Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, RT1 = RT2 = 100kΩ. No Load on LO or HO. Symbol Parameter Conditions Min (1) Typ Max (1) Units 6.0 6.9 7.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics IDD vs Frequency Operating Current vs Temperature 2.2 100 VDD = 12V RT = 10k CL = 2200 pF 2.0 1.8 CURRENT (mA) CL = 1000 pF CURRENT (mA) IDDO CL = 470 pF 10 1.6 1.4 1.2 1.0 CL = 0 pF 1 10 1 100 IHBO 0.8 -50 -25 1000 0 25 50 75 100 125 150 TEMPERATURE (°C) FREQUENCY (kHz) Figure 2. Figure 3. Quiescent Current vs Supply Voltage Quiescent Current vs Temperature 1.20 1.
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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Diode Forward Voltage Undervoltage Threshold Hysteresis vs Temperature 0.60 1.00E-01 0.55 T = 150°C 1.00E-02 HYSTERESIS (V) VDDH T = 25°C ID (A) 1.00E-03 1.00E-04 0.50 0.45 VHBH 0.40 T = -40°C 1.00E-05 1.00E-06 0.2 0.35 0.3 0.4 0.5 0.6 0.7 0.8 0.30 -50 0.9 -25 0 25 50 75 100 125 150 o TEMPERATURE ( C) VD (V) Figure 8. Figure 9.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Turn On Delay vs RT Resistor Value Turn On Delay vs Temperature (RT = 10k) 700 145 VCC = 12V 600 135 125 HI to HO Delay DELAY (ns) DELAY (ns) 500 400 300 LI to LO Delay 115 105 200 95 100 85 75 0 0 -50 10 20 30 40 50 60 70 80 90 100 -25 0 25 50 75 100 125 150 TEMPERATURE (oC) RT (k:) Figure 14. Figure 15.
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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 LM5102 Waveforms LI VDD HI HB HI Driver DLY Logic LI HO LO HS DLY Logic Driver TDL = tP + tRT2 TDL LO tP HO LM5102 tP VSS RT1 TDH TDH = tP + tRT1 RT2 Figure 17. Figure 18. Application Timing Waveforms Operational Notes The LM5102 offers a unique flexibility with independently programmable delay of the rising edge for both high and low side driver outputs independently.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.com LAYOUT CONSIDERATIONS The optimum performance of high and low side gate drivers cannot be achieved without taking due considerations during circuit board layout. Following points are emphasized. 1. A low ESR/ESL capacitor must be connected close to the IC, and between VDD and VSS pins and between HB and HS pins to support high peak currents being drawn from VDD during turn-on of the external MOSFET. 2.
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LM5102 www.ti.com SNVS268A – MAY 2004 – REVISED MARCH 2013 The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these events happens once per cycle, the diode power loss is proportional to frequency. Larger capacitive loads require more current to recharge the bootstrap capacitor resulting in more losses.
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LM5102 SNVS268A – MAY 2004 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Original (March 2013) to Revision A • 12 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 14-Feb-2014 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM5102MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM5102MMX/NOPB VSSOP DGS 10 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM5102SD WSON DPR 10 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5102MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0 LM5102MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.0 LM5102SD WSON DPR 10 1000 210.0 185.0 35.0 LM5102SD/NOPB WSON DPR 10 1000 210.0 185.0 35.0 LM5102SDX/NOPB WSON DPR 10 4500 367.0 367.0 35.
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MECHANICAL DATA DPR0010A SDC10A (Rev A) www.ti.
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