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LM5104

www.ti.com

SNVS269C –JANUARY 2004–REVISED MARCH 2013

LM5104 High Voltage Half-Bridge Gate Driver with Adaptive Delay

Check for Samples: LM5104

FEATURES

DESCRIPTION

The LM5104 High Voltage Gate Driver is designed to

• Drives Both a High Side and Low Side N-

drive both the high side and the low side N-Channel

Channel MOSFET

MOSFETs in a synchronous buck configuration. The

• Adaptive Rising and Falling Edges with

floating high-side driver is capable of working with

Programmable Additional Delay

supply voltages up to 100V. The high side and low

side gate drivers are controlled from a single input.

• Single Input Control

Each change in state is controlled in an adaptive

• Bootstrap Supply Voltage Range up to 118V

manner to prevent shoot-through issues. In addition

to the adaptive transition timing, an additional delay

• Fast Turn-Off Propagation Delay (25 ns

time can be added, proportional to an external setting

Typical)

resistor. An integrated high voltage diode is provided

to charge high side gate drive bootstrap capacitor. A

• Drives 1000 pF Loads with 15 ns Rise and Fall

robust level shifter operates at high speed while

Times

consuming low power and providing clean level

• Supply Rail Under-Voltage Lockout

transitions from the control logic to the high side gate

driver. Under-voltage lockout is provided on both the

TYPICAL APPLICATIONS

low side and the high side power rails. This device is

available in the standard SOIC and the WSON

• Current Fed Push-Pull Power Converters

packages.

• High Voltage Buck Regulators

• Active Clamp Forward Power Converters

PACKAGE

• Half and Full Bridge Converters

• SOIC

• WSON-10 (4 mm x 4 mm)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (20 pages)

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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 LM5104 High Voltage Half-Bridge Gate Driver with Adaptive Delay Check for Samples: LM5104 FEATURES DESCRIPTION • The LM5104 High Voltage Gate Driver is designed to drive both the high side and the low side N-Channel MOSFETs in a synchronous buck configuration. The floating high-side driver is capable of working with supply voltages up to 100V. The high side and low side gate drivers are controlled from a single input.
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.com SIMPLIFIED BLOCK DIAGRAM HV UVLO LEVEL SHIFT HO DRIVER HS IN RT VDD UVLO LO DRIVER VSS Connection Diagram VDD 1 8 LO VDD 1 10 HB 2 7 VSS HB 2 9 VSS LO SOIC-8 HO 3 6 IN HO 3 8 IN HS 4 5 RT HS 4 7 RT NC 5 6 NC Figure 1. 8-Lead SOIC See D Package 2 Figure 2.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 PIN DESCRIPTIONS Pin SOIC WSON 1 1 Name VDD Description Application Information Positive gate drive supply Locally decouple to VSS using ESR/ESL capacitor, located as close to IC as possible. 2 2 HB High side gate driver bootstrap rail Connect the positive terminal to bootstrap capacitor to the HB pin and connect negative terminal to HS.
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.com Electrical Characteristics Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, RT = 100kΩ. No Load on LO or HO. Symbol Parameter Conditions Min (1) Typ Max (1) Units SUPPLY CURRENTS IDD VDD Quiescent Current LI = HI = 0V 0.4 0.6 mA IDDO VDD Operating Current f = 500 kHz 1.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 Switching Characteristics Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO .
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics IDD vs Frequency 100 Operating Current vs Temperature 2.0 VDD = 12V CL = 4400 pF IDDO RT = 10k 1.9 10 1.7 CURRENT (mA) CURRENT (mA) CL = 1000 pF CL = 2200 pF CL = 470 pF 1 1.5 1.3 1.1 CL = 0 pF IHBO 0.9 0 10 1 100 0.7 -50 -25 1000 0 FREQUENCY (kHz) 25 50 75 100 125 150 TEMPERATURE (°C) Figure 3. Figure 4. Quiescent Current vs Supply Voltage Quiescent Current vs Temperature 1.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Undervoltage Threshold Hysteresis vs Temperature Diode Forward Voltage 0.60 1.00E-01 T = 150°C 0.55 1.00E-02 VDDH 0.50 HYSTERESIS (V) T = 25°C ID (A) 1.00E-03 1.00E-04 0.45 VHBH 0.40 T = -40°C 1.00E-05 0.35 1.00E-06 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.30 -50 0.9 -25 0_ 25 50_ 75_100_125_150_ TEMPERATURE (oC) VD (V) Figure 9. Figure 10.
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 LM5104 Waveforms VDD HB IN Adapt Logic DLY Logic Driver Adapt Logic DLY Logic Driver HO HS LO LM5104 VSS RT 50% LM5104 WAVEFORMS IN tp+TRT LO tp 50% tp tp+TRT 50% HO Td Td Figure 18.
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.com OPERATIONAL DESCRIPTION ADAPTIVE SHOOT-THROUGH PROTECTION LM5104 is a high voltage, high speed dual output driver designed to drive top and bottom MOSFET’s connected in synchronous buck or half-bridge configuration, from one externally provided PWM signal. LM5104 features adaptive delay to prevent shoot-through current through top and bottom MOSFETs during switching transitions.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 POWER DISSIPATION CONSIDERATIONS The total IC power dissipation is the sum of the gate driver losses and the bootstrap diode losses.
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LM5104 SNVS269C – JANUARY 2004 – REVISED MARCH 2013 www.ti.com The total IC power dissipation can be estimated from the above plots by summing the gate drive losses with the bootstrap diode losses for the intended application. Because the diode losses can be significant, an external diode placed in parallel with the internal bootstrap diode (refer to Figure 22) can be helpful in removing power from the IC.
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LM5104 www.ti.com SNVS269C – JANUARY 2004 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision B (March 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 14-Feb-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM5104MX Package Package Pins Type Drawing SOIC D SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM5104MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM5104SD/NOPB WSON DPR 10 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5104MX SOIC D 8 2500 367.0 367.0 35.0 LM5104MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM5104SD/NOPB WSON DPR 10 1000 210.0 185.0 35.0 LM5104SDX/NOPB WSON DPR 10 4500 367.0 367.0 35.
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MECHANICAL DATA DPR0010A SDC10A (Rev A) www.ti.
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