Datasheet

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DRIVER

UVLO

DRIVER

UVLO

LEVEL

SHIFT

LEADING

EDGE

DELAY

LEADING

EDGE

DELAY

RDT

LM5105

www.ti.com

SNVS349C –FEBRUARY 2005–REVISED MARCH 2013

LM5105 100V Half Bridge Gate Driver with Programmable Dead-Time

Check for Samples: LM5105

FEATURES

DESCRIPTION

The LM5105 is a high voltage gate driver designed to

• Drives Both a High Side and Low Side N-

drive both the high side and low side N –Channel

Channel MOSFET

MOSFETs in a synchronous buck or half bridge

• 1.8A Peak Gate Drive Current

configuration. The floating high-side driver is capable

• Bootstrap Supply Voltage Range up to 118V

of working with rail voltages up to 100V. The single

control input is compatible with TTL signal levels and

a single external resistor programs the switching

• Integrated Bootstrap Diode

transition dead-time through tightly matched turn-on

• Single TTL Compatible Input

delay circuits. A high voltage diode is provided to

• Programmable Turn-On Delays (Dead-Time)

charge the high side gate drive bootstrap capacitor.

The robust level shift technology operates at high

• Enable Input Pin

speed while consuming low power and provides clean

• Fast Turn-Off Propagation Delays (26ns

output transitions. Under-voltage lockout disables the

Typical)

gate driver when either the low side or the

• Drives 1000pF with 15ns Rise and Fall Time bootstrapped high side supply voltage is below the

operating threshold. The LM5105 is offered in the

• Supply Rail Under-Voltage Lockout

thermally enhanced WSON plastic package.

• Low Power Consumption

TYPICAL APPLICATIONS PACKAGE

• Solid State motor drives • WSON-10 (4 mm x 4 mm)

• Half and Full Bridge power converters

SIMPLIFIED BLOCK DIAGRAM

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (19 pages)

PAGE 1
LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 LM5105 100V Half Bridge Gate Driver with Programmable Dead-Time Check for Samples: LM5105 FEATURES DESCRIPTION • The LM5105 is a high voltage gate driver designed to drive both the high side and low side N –Channel MOSFETs in a synchronous buck or half bridge configuration. The floating high-side driver is capable of working with rail voltages up to 100V.
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LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Connection Diagram VDD 1 10 HB 2 9 VSS HO 3 8 IN HS 4 7 EN NC 5 6 RDT LO Figure 1. 10-Lead WSON PIN DESCRIPTIONS PIN NAME NO. DESCRIPTION VDD 1 Positive gate drive supply.Decouple VDD to VSS using a low ESR/ESL capacitor, placed as close to the IC as possible. HB 2 High-side gate driver bootstrap rail. Connect the positive terminal of bootstrap capacitor to the HB pin and connect negative terminal to HS.
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LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 Absolute Maximum Ratings (1) (2) VDD to VSS –0.3V to +18V HB to HS –0.3V to +18V IN and EN to VSS –0.3V to VDD + 0.3V LO to VSS –0.3V to VDD + 0.3V HO to VSS HS – 0.3V to HB + 0.3V HS to VSS (3) −5V to +100V HB to VSS 118V RDT to VSS –0.
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LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Electrical Characteristics Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = HB = 12V, VSS = HS = 0V, EN = 5V. No load on LO or HO. RDT= 100kΩ (1). Symbol Parameter Conditions Min Typ Max Units 0.6 mA SUPPLY CURRENTS IDD VDD Quiescent Current IN = EN = 0V 0.34 IDDO VDD Operating Current f = 500 kHz 1.
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LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 Switching Characteristics Specifications in standard typeface are for TJ = +25°C, and those in boldface type apply over the full operating junction temperature range. Unless otherwise specified, VDD = HB = 12V, VSS = HS = 0V, No Load on LO or HO (1).
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LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VDD Operating Current vs Frequency Operating Current vs Temperature 100 2.2 VDD = HB = 12V CL = 2200 pF VSS = HS = 0V RDT = 10K f = 500 kHz 2.0 VSS = HS = 0 CURRENT (mA) CL = 1000 pF CURRENT (mA) VDD = HB = 12V CL = 470 pF 10 1.8 CL = 0 pF IDDO 1.6 1.4 IHBO 1.2 CL = 0 pF 1 10 1 100 1.0 -50 -30 -10 10 30 50 70 90 110 130 150 1000 TEMPERATURE (oC) FREQUENCY (kHz) Figure 2. Figure 3.
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LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Undervoltage Hysteresis vs Temperature Diode Forward Voltage 0.60 1.00E-01 0.55 T = 150°C 1.00E-02 VDDH HYSTERESIS (V) 0.50 T = 25°C ID (A) 1.00E-03 1.00E-04 0.45 VHBH 0.40 T = -40°C 1.00E-05 0.35 1.00E-06 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.30 -50 0.9 -25 75 100 125 150 Figure 8. Figure 9.
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LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Dead-Time vs RT Resistor Value Dead-Time vs Temperature (RT = 10k) 88 900 800 86 VDD = HB = 12V VSS = HS = 0 DEAD-TIME (ns) DEAD-TIME (ns) 700 600 500 400 300 84 82 80 200 78 100 0 10 30 50 70 90 110 76 -50 -30 -10 10 30 50 70 90 110 130 150 130 150 RDT (k:) TEMPERATURE (oC) Figure 14. Figure 15.
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LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 Timing Diagrams IN EN LO ten tLPHL tHPHL tHPLH tLPLH DT1 DT2 DT1 DT2 tsd ten HO tsd Figure 17. LM5105 Input - Output Waveforms VIH IN VIL tLPHL tLPLH 90% LO 10% 90% tHPLH HO tHPHL 10% Figure 18. LM5105 Switching Time Definitions: tLPLH, tLPHL, tHPLH, tHPHL 90% HO VIH EN 10% DT1 DT2 90% MDT = |DT1-DT2| LO or HO tsd 90% Figure 19. LM5105 Enable: tsd LO 10% Figure 20.
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LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com Operational Notes The LM5105 is a single PWM input Gate Driver with Enable that offers a programmable dead-time. The deadtime is set with a resistor at the RDT pin and can be adjusted from 100ns to 600ns. The wide dead-time programming range provides the flexibility to optimize drive signal timing for a wide range of MOSFETS and applications. The RDT pin is biased at 3V and current limited to 1 mA maximum programming current.
PAGE 11
LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 1.000 CL = 4400 pF CL = 2200 pF POWER (W) 0.100 CL = 1000 pF 0.010 CL = 470 pF CL = 0 pF 0.001 0.1 1.0 10.0 100.0 1000.0 SWITCHING FREQUENCY (kHz) Figure 21. Gate Driver Power Dissipation (LO + HO) VCC = 12V, Neglecting Diode Losses The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery.
PAGE 12
LM5105 SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 www.ti.com HS Transient Voltages Below Ground The HS node will always be clamped by the body diode of the lower external FET. In some situations, board resistances and inductances can cause the HS node to transiently swing several volts below ground. The HS node can swing below ground provided: 1. HS must always be at a lower potential than HO. Pulling HO more than -0.
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LM5105 www.ti.com SNVS349C – FEBRUARY 2005 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision B (March 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 14-Feb-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM5105SD/NOPB WSON DPR 10 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM5105SDX/NOPB WSON DPR 10 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5105SD/NOPB WSON DPR 10 1000 210.0 185.0 35.0 LM5105SDX/NOPB WSON DPR 10 4500 367.0 367.0 35.
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MECHANICAL DATA DPR0010A SDC10A (Rev A) www.ti.
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