Datasheet

LM5113
www.ti.com SNVS725F –JUNE 2011–REVISED APRIL 2013
(3)
C
LoadH
and C
LoadL
are the high-side and the low-side capacitive loads respectively. It can also be calculated with
the total input gate charge of the high-side and the low-side transistors as
(4)
There are some additional losses in the gate drivers due to the internal CMOS stages used to buffer the LO and
HO outputs. The following plot shows the measured gate driver power dissipation versus frequency and load
capacitance. At higher frequencies and load capacitance values, the power dissipation is dominated by the
power losses driving the output loads and agrees well with the above equations. This plot can be used to
approximate the power losses due to the gate drivers.
Gate Driver Power Dissipation (LO+HO)
VDD=+5V
Figure 18. Neglecting Bootstrap Diode Losses
The bootstrap diode power loss is the sum of the forward bias power loss that occurs while charging the
bootstrap capacitor and the reverse bias power loss that occurs during reverse recovery. Since each of these
events happens once per cycle, the diode power loss is proportional to the operating frequency. Larger
capacitive loads require more energy to recharge the bootstrap capacitor resulting in more losses. Higher input
voltages (V
IN
) to the half bridge also result in higher reverse recovery losses.
The following two plots illustrate the forward bias power loss and the reverse bias power loss of the bootstrap
diode respectively. The plots are generated based on calculations and lab measurements of the diode reverse
time and current under several operating conditions. The plots can be used to predict the bootstrap diode power
loss under different operating conditions.
The Load of High-Side Driver is a GaN FET
with Total Gate Charge of 10nC
Figure 19. Forward Bias Power Loss of
Bootstrap Diode V
IN
=50V
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LM5113