Datasheet

LM628, LM629
SNVS781C JUNE 1999REVISED MARCH 2013
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In operation, the filter algorithm receives a 16-bit error signal from the loop summing-junction. The error signal is
saturated at 16 bits to ensure predictable behavior. In addition to being multiplied by filter coefficient kp, the error
signal is added to an accumulation of previous errors (to form the integral signal) and, at a rate determined by
the chosen derivative sampling interval, the previous error is subtracted from it (to form the derivative signal). All
filter multiplications are 16-bit operations; only the bottom 16 bits of the product are used.
The integral signal is maintained to 24 bits, but only the top 16 bits are used. This scaling technique results in a
more usable (less sensitive) range of coefficient ki values. The 16 bits are right-shifted eight positions and
multiplied by filter coefficient ki to form the term which contributes to the motor control output. The absolute
magnitude of this product is compared to coefficient il, and the lesser, appropriately signed magnitude then
contributes to the motor control signal.
The derivative signal is multiplied by coefficient kd each derivative sampling interval. This product contributes to
the motor control output every sample interval, independent of the user-chosen derivative sampling interval.
The kp, limited ki, and kd product terms are summed to form a 16-bit quantity. Depending on the output mode
(wordsize), either the top 8 or top 12 bits become the motor control output signal.
LM628 READING AND WRITING OPERATIONS
The host processor writes commands to the LM628 via the host I/O port when Port Select (PS ) input (Pin 16) is
logic low. The desired command code is applied to the parallel port line and the Write (WR ) input (Pin 15) is
strobed. The command byte is latched into the LM628 on the rising edge of the WR input. When writing
command bytes it is necessary to first read the status byte and check the state of a flag called the “busy bit” (Bit
0). If the busy bit is logic high, no command write may take place. The busy bit is never high longer than 100 μs,
and typically falls within 15 μs to 25 μs.
The host processor reads the LM628 status byte in a similar manner: by strobing the Read (RD ) input (Pin 13)
when PS (Pin 16) is low; status information remains valid as long as RD is low.
Writing and reading data to/from the LM628 (as opposed to writing commands and reading status) are done with
PS (Pin 16) logic high. These writes and reads are always an integral number (from one to seven) of two-byte
words, with the first byte of each word being the more significant. Each byte requires a write (WR ) or read (RD )
strobe. When transferring data words (byte-pairs), it is necessary to first read the status byte and check the state
of the busy bit. When the busy bit is logic low, the user may then sequentially transfer both bytes comprising a
data word, but the busy bit must again be checked and found to be low before attempting to transfer the next
byte pair (when transferring multiple words). Data transfers are accomplished via LM628-internal interrupts
(which are not nested); the busy bit informs the host processor when the LM628 may not be interrupted for data
transfer (or a command byte). If a command is written when the busy bit is high, the command will be ignored.
The busy bit goes high immediately after writing a command byte, or reading or writing a second byte of data
(See Figure 6 thru Figure 8).
MOTOR OUTPUTS
The LM628 DAC output port can be configured to provide either a latched eight-bit parallel output or a
multiplexed 12-bit output. The 8-bit output can be directly connected to a flow-through (non-input-latching) D/A
converter; the 12-bit output can be easily demultiplexed using an external 6-bit latch and an input-latching 12-bit
D/A converter. The DAC output data is offset-binary coded; the 8-bit code for zero is 80 hex and the 12-bit code
for zero is 800 hex. Values less than these cause a negative torque to be applied to the motor and, conversely,
larger values cause positive motor torque. The LM628, when configured for 12-bit output, provides signals which
control the demultiplexing process. See for details.
The LM629 provides 8-bit, sign and magnitude PWM output signals for directly driving switch-mode motor-drive
amplifiers. Figure 12 shows the format of the PWM magnitude output signal.
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