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LM81

www.ti.com

SNAS011E –JUNE 1999–REVISED FEBRUARY 2002

LM81 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor

Check for Samples: LM81

FEATURES

APPLICATIONS

• Temperature Sensing

• System Thermal and Hardware Monitoring for

Servers and PCs

• 6 Positive Voltage Inputs with Scaling

Resistors to Monitor +5V, +12V, +3.3V, +2.5V, • Office Electronics

Vccp Power Supplies Directly

• Electronic Test Equipment and

• 8-Bit DAC Output for Controlling Fan Speed Instrumentation

• 2 Fan Speed Monitoring Inputs

DESCRIPTION

• Chassis Intrusion Detector Input

The LM81 is a highly integrated data acquisition

• WATCHDOG Comparison of all Monitored

system for hardware monitoring of servers, Personal

Values

Computers, or virtually any microprocessor-based

• SMBus 1.0 (LM81C) and 1.1 (LM81B) Serial

system. In a PC, the LM81 can be used to monitor

power supply voltages, temperatures, and fan

Bus Interface Compatibility

speeds. Actual values for these inputs can be read at

• LM81B has Improved Voltage Monitoring

any time. Programmable WATCHDOG limits in the

Accuracy

LM81 activate a fully programmable and maskable

• VID0-VID4 Monitoring Inputs

interrupt system with two outputs (INT and T_CRIT_).

The LM81 has an on-chip digital output temperature

KEY SPECIFICATIONS

sensor with 9-bit or 12-bit resolution, a 6 analog input

ADC with 8-bit resolution and an 8-bit DAC. Two fan

• Voltage Monitoring Error: +2% or ±1.2% (max)

tachometer outputs can be measured with the LM81’s

• Temperature Error

FAN1 and FAN2 inputs. The DAC, with a 0 to 1.25V

– −40˚C to +125˚C ± 3˚C (max) output voltage range, can be used for fan speed

control. Additional inputs are provided for Chassis

• Supply Voltage Range: 2.8V to 3.8V

Intrusion detection circuits, and VID monitor inputs.

• Supply Current: 0.4 mA (typ)

The LM81 has a Serial Bus interface that is

• ADC and DAC Resolution: 8 Bits

compatible with SMBus. Serial Bus Timing Diagram

• Temperature Resolution: 0.5˚C

TYPICAL APPLICATION

Figure 1.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (43 pages)

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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 LM81 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor Check for Samples: LM81 FEATURES APPLICATIONS • • • 1 2 • • • • • • • Temperature Sensing 6 Positive Voltage Inputs with Scaling Resistors to Monitor +5V, +12V, +3.3V, +2.5V, Vccp Power Supplies Directly 8-Bit DAC Output for Controlling Fan Speed 2 Fan Speed Monitoring Inputs Chassis Intrusion Detector Input WATCHDOG Comparison of all Monitored Values SMBus 1.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Figure 3.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Table 1. PIN DESCRIPTIONS Pin Name(s) Pin Number Number of Pins Type Description A0/NTEST_OUT 1 1 Digital I/0 The lowest order programmable bit of the serial bus address. This pin functions as an output during NAND Tree tests (board-level connectivity testing). Refer to the NAND TREE TESTS section. A1 2 1 Digital Input The highest order programmable bit of the serial bus address.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 ABSOLUTE MAXIMUM RATINGS (1) (2) (3) MIN Positive Supply Voltage Voltage on Any Input or Output Pin: +15.0 V A0, A1, DACOut −0.3 (V++ 0.3) V Input Current at any Pin (5) Package Input Current (5) Maximum Junction Temperature (TJ max) ESD Susceptibility (5) Human Body Model (3) (4) (5) (6) See (4) −0.3 +6.0 V -5.0 +5.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com DC ELECTRICAL CHARACTERISTICS (1) The following specifications apply for +2.8VDC ≤ V+ ≤ +3.8VDC, RS = 500Ω, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. SYMBOL PARAMETER TEST CONDITIONS TYPICAL (2) LIMITS LIMITS LM81BIM (3) LM81CIM (3) UNIT POWER SUPPLY CHARACTERISTICS I+ Supply Current Interface Inactive 0.4 1.4 0.9 mA (max) ±3 ±3 ˚C (max) 0.5 0.5 ˚C (min) 0.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 DC ELECTRICAL CHARACTERISTICS(1) (continued) The following specifications apply for +2.8VDC ≤ V+ ≤ +3.8VDC, RS = 500Ω, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. SYMBOL PARAMETER DAC Error TEST CONDITIONS TYPICAL (2) LIMITS LIMITS LM81BIM (3) LM81CIM (3) V+ = 3.3V UNIT ±5 ±5 % (max) ±62.5 ±62.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com DC ELECTRICAL CHARACTERISTICS(1) (continued) The following specifications apply for +2.8VDC ≤ V+ ≤ +3.8VDC, RS = 500Ω, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. SYMBOL PARAMETER TEST CONDITIONS VOUT(0) Logical “0” Output Voltage IOUT = −3.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 AC ELECTRICAL CHARACTERISTICS The following specifications apply for +2.8VDC ≤ V+ ≤ +3.8VDC on SMBCLK and SMBData, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C. (See (1)) SYMBOL TYP (2) PARAMETER LIMITS (3) UNIT SERIAL BUS TIMING CHARACTERISTICS t1 SMBCLK (Clock) Period trise SMBCLK and SMBData Rise Time 2.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Table 2. Pin Name D2 D3 R1 R2 INT D1 x x D4 0 ∞ CI x x 0 ∞ FAN1–FAN2 x 0 ∞ SMBCLK x 0 ∞ x x 0 ∞ SMBData x x 0 ∞ A0/NTEST_OUT x x x 0 ∞ A1 x x x 0 ∞ +12Vin x x RESET Vccp1, Vccp2 x +5Vin x x +3.3Vin, +2.5Vin x x T_CRIT_A x VID4–VID0 x x DACOut/NTEST_I N x R1+R2 ∼120k x x ∞ 0 R1+R2 ∼120k x R1+R2 ∼120k x 0 ∞ x 0 ∞ x 0 ∞ x Figure 5.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 TEST CIRCUIT Figure 6. Digital Output Load Test Circuitry FUNCTIONAL DESCRIPTION GENERAL DESCRIPTION The LM81 provides 6 analog inputs, a temperature sensor, a Delta-Sigma ADC (Analog-to-Digital Converter), a DAC output, 2 fan speed counters, WATCHDOG registers, and a variety of inputs and outputs on a single chip. A two wire Serial Bus interface is included.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com The LM81 has several internal registers, as shown in Figure 7, Table 3 and the REGISTERS AND RAM section. These include: • Configuration Register: Provides control and configuration. • Interrupt Status Registers: Two registers to provide status of each WATCHDOG limit or Interrupt event. • Interrupt Mask Registers: Allows masking of individual Interrupt sources, as well as separate masking for each of the two hardware Interrupt outputs.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 INTERFACE Figure 7.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com INTERNAL REGISTERS OF THE LM81 Table 3.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Figure 9. Serial Bus Write to the Internal Address Register Only Figure 10. Serial Bus Read from a Register with the Internal Address Register Preset to Desired Location The Serial Bus control lines consist of the SMBData (serial data), SMBCLK (serial clock) and A0-A1 (address) pins. The LM81 can operate only as a slave.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com USING THE LM81 POWER ON When power is first applied, the LM81 performs a “power on reset” on several of its registers. The power on condition of the LM81’s registers in shown in Table 1 Registers whose power on values are not shown have power on conditions that are indeterminate (this includes the value RAM ,exclusive of the DAC data, and WATCHDOG limits). When power is first applied the ADC is inactive.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 STARTING CONVERSIONS The monitoring function (Analog inputs, temperature, and fan speeds) in the LM81 is started by writing to the Configuration Register and setting INT_Clear (Bit 3), low, and Start (bit 0), high. The LM81 then performs a “round-robin” monitoring of all analog inputs, temperature, and fan speed inputs approximately once every 400 ms. The sequence of items being monitored corresponds to locations in the Value RAM and is: 1.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Thus monitoring power supplies within a system can be easily accomplished by tying the Vccp, +2.5 Vin, +3.3 Vin, +5 Vin and +12 Vin analog inputs to the corresponding system supply. A digital reading can be converted to a voltage by simply multiplying the decimal value of the reading by the LSB size. For inputs with attenuators the input impedance is greater than 90 kΩ.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 ANALOG INPUT INTERRUPTS A WATCHDOG window comparison on the analog inputs can activate the INT interrupt output. A converted input voltage that is above its respective HIGH limit or less than or equal to its LOW limit will cause a flag to be set in its Interrupt Status Register. This flag will activate the INT output when its mask bit is set low. Mask bits are found in the Interrupt Mask Registers.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com ALTERNATIVES FOR FAN INPUTS Figure 12. Fan with Tach Pull-Up to +5V Figure 13. Fan with Tach Pull-Up to +12V, or Totem-Pole Output and Resistor Attenuator Figure 14. Fan with Tach Pull-Up to +12V and Diode Clamp Figure 15. Fan with Strong Tach Pull-Up or Totem Pole Output and Diode Clamp NOTE Counts are based on 2 pulses per revolution tachometer outputs.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 DAC OUTPUT The LM81 provides an 8-bit DAC (Digital-to-Analog Converter) with an output range of 0 to 1.25 volts (4.88 mV LSB). This DAC can be used in any way, but in most applications of the LM81 the DAC will be used for fan control. Typically the DAC output would be amplified to provide the up to 12 volt drive required by the fan. At power-on the DAC provides full output, insuring that full fan speed is the default condition.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Figure 16. Amplifier Circuit for Connection Between DAC Output and Fan TEMPERATURE MEASUREMENT SYSTEM The LM81 temperature sensor and ADC produce 9-bit or 12-bit two’s-complement temperature data. A digital comparator compares the temperature data to the user-programmable High, Low, Critical setpoints and Hysteresis values.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Figure 17. 9-bit Temperature-to-Digital Transfer Function Figure 18.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com TEMPERATURE DATA FORMAT Temperature data can be read from the Temperature, THIGH setpoint, THIHYST setpoint, TLOW setpoint, TC setpoint and THYST Offset registers; and written to the THIGH setpoint, THIHYST, TLOW setpoint, T_CRIT setpoint and THYST offset registers.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Normal Repetitive Interrupt Mode is shown in Figure 19 and operates in the following way: T_CRIT_A is disabled. Exceeding THIGH causes an interrupt that will remain active indefinitely until reset by reading Interrupt Status Register 1. Once reset if the temperature remains above the THIHYST setpoint the interrupt will again be activated at the completion of another conversion cycle.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Extended Repetitive Interrupt Mode is shown in Figure 22 and operates in the following way: Once activated, all interrupts remain activated until reset by a read of the Interrupt Status Register 1. Once activated all T_CRIT_A interrupts remain activated until reset by a read of the Extended Mode Register 1. Temperature conversion data less than or equal to TLOW will activate interrupt.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Figure 24. Extended Comparator Mode (1) (1) Interrupt resets occur only when interrupt Status Register 1 is read.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com THE LM81 INTERRUPT STRUCTURE Figure 25. Interrupt Structure Figure 25 depicts the Interrupt Structure of the LM81. The LM81 can generate Interrupts as a result of each of its internal WATCHDOG registers on the analog, temperature, and fan inputs.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 External Interrupts can come from the following source. While the label suggests a specific type or source of Interrupt, this label is not a restriction of its usage, and it could come from any desired source: • Chassis Intrusion: This is an active high interrupt from any type of device that detects and captures chassis intrusion violations.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Figure 26. FAN MANUFACTURERS Manufacturers of cooling fans with tachometer outputs are listed below: NMB Tech 9730 Independence Ave. Chatsworth, California 91311 818 341-3355 818 341-8207 Model Number Frame Size Airflow CFM 2408NL 2.36 in sq. X 0.79 in (60 mm sq. X 20 mm) 9-16 2410ML 2.36 in sq. X 0.98 in (60 mm sq. X 25 mm) 14-25 3108NL 3.15 in sq. X 0.79 in (80 mm sq. X 20 mm) 25-42 3110KL 3.15 in sq. X 0.98 in (80 mm sq.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Model Number Frame Size Airflow CFM 109P08XXY601 3.15 in sq. X 0.79 in (80 mm sq. X 20 mm) 23-30 109R08XXY401 3.15 in sq. X 0.98 in (80 mm sq. X 25 mm) 21-42 REGISTERS AND RAM ADDRESS REGISTER The main register is the ADDRESS Register. The bit designations are as follows: Bit Name Read/Write Description 7-0 Address Pointer Write Address of RAM and Registers. See the tables below for more details.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Power on default - <7:0> = 00001000 binary Bit Name Read/Write Description 1 INT Enable Read/Write A one enables the INT Interrupt output. 2 Reserved Read/Write 3 INT_Clear Read/Write A one disables the INT output without affecting the contents of Interrupt Status Registers. The device will stop monitoring. It will resume upon clearing of this bit.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 INTERRUPT MASK REGISTER 1 — ADDRESS 43H Power on default - <7:0> = 00001000 binary Bit Name Read/Write Description 0 +2.5Vin Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 1 Vccp1 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 2 +3.3Vin Read/Write A one disables the corresponding interrupt status bit for INT interrupt.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com VID/FAN DIVISOR REGISTER — ADDRESS 47H Power on default - <7:4> is 0101, and <3:0> is mapped to VID <3:0> Bit Name Read/Write Description 0-3 VID <3:0> Read Only The VID <3:0> inputs from the Pentium/PRO power supplies that indicate the operating voltage (e.g. 1.5V to 2.9V). 4-5 FAN1 RPM Control Read/Write FAN1 Speed Control. <5:4> = 00 - divide by 1; <5:4> = 01 - divide by 2; <5:4> = 10 - divide by 4; <5:4> = 11 - divide by 8.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 Power on default - <7:0> = 0100 0100 binary Bit Name Read/Write Description 1 LOW Limit Mask Bit Read/Write A mask bit for the LOW limit Interrupt. A one disables the interrupt from propagating to the INT pin. 2-3 T_CRIT_A Interrupt Mode Select Read/Write The state of these bits select the interrupt mode for T_CRIT_A as described below.
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LM81 SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 www.ti.com Address A6–A0 (1) Description 31h (1) +5Vin High Limit 32h +5Vin Low Limit 33h +12Vin High Limit 34h +12Vin Low Limit 35h Vccp2 High Limit 36h Vccp2 Low Limit 37h T_CRIT Limit (Extended Mode) 38h LOW Limit (Extended Mode) 39h HIGH Temperature Limit 3Ah HIHYST Temperature Limit 3Bh FAN1 Fan Count Limit (3) 3Ch FAN2 Fan Count Limit (3) 3Dh Reserved 3Eh Company Identification.
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LM81 www.ti.com SNAS011E – JUNE 1999 – REVISED FEBRUARY 2002 TYPICAL APPLICATION In the following PC application, the LM81 monitors temperature, fan speed for 2 fans, and 6 power supply voltages. It also monitors an optical chassis intrusion detector. The LM81 provides a DAC output that can be used to control fan speed. Figure 27.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 7-Oct-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM81BIMTX-3/NOPB TSSOP PW 24 2500 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 LM81CIMTX-3/NOPB TSSOP PW 24 2500 330.0 16.4 6.95 8.3 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM81BIMTX-3/NOPB TSSOP PW 24 2500 367.0 367.0 35.0 LM81CIMTX-3/NOPB TSSOP PW 24 2500 367.0 367.0 35.
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