LM96570 LM96570 Ultrasound Configurable Transmit Beamformer Literature Number: SNAS505D
LM96570 Ultrasound Configurable Transmit Beamformer General Description Features The LM96570 is an eight-channel monolithic beamformer for pulse generators in multi-channel medical ultrasound applications. It is well-suited for use with National’s LM965XX series chipset which offers a complete medical ultrasound solution targeted towards low-power, portable systems. The LM96570 offers eight P and N output channels with individual delays of up to 102.4 µs operating at pulse rates of up to 80 MHz.
LM96570 Connection Diagram 30129701 FIGURE 1. Pin Diagram of LM96570 Ordering Information Part Number Package NSC Drawing 32–Lead LLP SQA32A LM96570SQ LM96570SQE 1000 LM96570SQX www.national.
LM96570 Pin Descriptions Pin No. Name Type 1 – 4, 21 – 32 P0-7, N0-7 Output Control signals for pulser. P outputs control positive pulses and N outputs control negative pulses. See logic Table 1. 13 PLL_CLK+ Input PLL Reference Clock PLUS Input, LVDS compatible or Single-Ended LV CMOS input, programmable through 4-Wire Serial Interface (Register 1Bh[0]) 14 PLL_CLK- Input PLL Reference Clock MINUS input, LVDS compatible.
LM96570 Absolute Maximum Ratings (Note 1) Operating Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Temperature Range(TA) VDDA, Analog Supply VDDC, Digital Core Supply VIO, Digital IO Supply (Note 1) 0°C to + 70°C +1.71V to +1.89V +1.71V to +1.89V +2.37 to +3.
LM96570 Digital Electrical Characteristics Unless otherwise stated, the following conditions apply VIO = +3.3V, VDDA = VDDC = +1.8V, TA = 25°C. Symbol Parameter Conditions Min Typ Max Unit 200 400 mV PLL DIFFERENTIAL REFERENCE CLOCK DC SPECIFICATIONS VID PLL Reference Clock AC Coupled to pins 13 & 14. 1B[0] = 0 Differential Input Amplitude (see (Note 2)) VICM PLL Reference Clock Input Pins 13 & 14 bias voltage, VICM ≈ 0.5 Common Mode Voltage X VDDA 0.
LM96570 Timing Diagrams 30129704 FIGURE 2. 4-Wire Serial Interface WRITE Timing 30129705 FIGURE 3. 4-Wire Serial Interface READ Timing www.national.
LM96570 Typical Performance Characteristics 1δ Output Jitter 30129718 Output Phase Noise 30129717 7 www.national.
LM96570 flexible, integrated pulse pattern generation and delay architecture enables low-power designs suitable for ultra-portable applications. A complete system can be designed using National’s companion LM9655x chipset. Overview The LM96570 beamformer provides an 8-channel transmit side solution for medical ultrasound applications suitable for integration into multi-channel (128 / 256 channel) systems. Its 30129702 FIGURE 4.
P/N OUTPUT PATTERN PROGRAMMING The output pulse pattern for each of the 8 P channels is set by programming registers 08h to 0Fh, respectively. The output pulse pattern for each of the 8 N channels is set by programming registers 10h to 17h, respectively. Programming each bit of these registers yields P/N output pulses TABLE 1.
LM96570 30129714 FIGURE 5. Fine Delay Adjustment (00–07h[2:0]) in 1/8 Internal Clock Phase Angle Steps Since an internal clock cycle is 6.25 ns, the total 17-bit userprogrammable delay ranges from 0 up to approximately 102.4μs. The following example illustrates a 64-bit pulse pattern with various delay profiles. Here, the user-programmable pulse Ch. Register output frequency is 10 MHz. The delays are programmed such that the delay between adjacent channels is approximately 13.
LM96570 30129710 FIGURE 6. Beamformer Output Example PULSE WIDTH ADJUST 30129706 FIGURE 7. High-Voltage Pulser Figure 7 is a diagram for a high-voltage pulser such as the LM96550. The input control signals Pn/Nn are provided by the beamformer output. These signals are level shifted up/down to the high voltage “HV”/”-HV” and buffered to drive the output stage of M1/M2 to generate high-voltage outputs. High linearity and low distortion are typically required for pulser outputs.
LM96570 tp1=tp2. (See the right half of Figure 8.) Since Pn and Nn and low-voltage signals, it is much easier to control their timing. After such pulse width adjustments are made, the output of the pulser will have the desired duty cycle. 30129707 FIGURE 8. Duty Cycle Adjustment Pulse Width Adjustment is achieved indirectly by exploiting the fact that the P and N pulses never overlap and by manipulating the phase delays of the P and N outputs relative to each other.
Figure 10 illustrates the Pulse Width Adjust operation in further detail. In this example, 00h[21:20] = “01”. Internally both original P and original N have an alternative phase version that lags their original phase version. Alternative phase is set by the value in 00h[19:17]. The P output is the OR’d result of the original P with the internally delayed P', while the N output is the AND’d result of the original N with the internally delayed N'.
LM96570 30129716 FIGURE 11. Pulse Width Adjustment (00h[21:20] = “10”) In the case where Pulse Width Adjustment is enabled and a Fire Delay Profile is programmed, the total output delay relative to the TX_EN signal for the Pulse Width Adjusted output is [the internal propagation delay] + [the programmed delay value] + [pulse width adjustment value] and the total output delay for the other output is just [the internal propagation delay value] + [the programmed delay].
Register Data Programmed Fire Delay Ch 7 Reg. 07h 00 111 00000000001110 111 b 14CD + 7FD Actual Fire Delay* P to N Delay & P's Pluse Width N: 14CD + 7FD P fires at the same time as N. P’s pulse width is the same as N. P: 14CD + 7FD * These delays do not include the internal propagation delay relative to the TX_EN rising edge. See Beamformer Output Timing Characteristics. 30129711 FIGURE 12. Beamformer Output with Pulse Width Adjustment 15 www.national.com LM96570 Ch.
LM96570 TABLE 3.
LM96570 Register Definitions INDIVIDUAL CHANNEL (0 to 7) DELAY PROFILE REGISTERS Address: 00h to 07h Registers 00h to 07h control the individual delay profile and Pulse Width adjustments for channels 0 to 7, respectively.
LM96570 Bit(s) Description 2:0 FDA: Fine Delay Adjust. These 3 bits set the clock phase for the 14-bit programmable counter, which in turn control the fractional amount of delay in increments of 1/8 for the P/N outputs relative to the internal Fire signal. Again, this is not to be confused with the delays associated with Pulse Width Adjustment, which involves delaying the P outputs relative to the N output.
LM96570 ALL CHANNELS (0 TO 7) “P” PART PULSE PATTERN REGISTER Address: 18h Register 18h controls the “P” part pulse pattern for all channels, 0 to 7. b[63:0], b[63:16], b[63:24], b[63:32], b[63:40], b[63:48], b[63:56], or b[63:60] Description PPPA 18h Default 5555 5555 5555 5555 h Bit(s) Description 63:0, 63:16, 63:24, 63:32, 63:40, 63:48, 63:56, 63:60 PPPA: “P” Part Pulse Pattern for ALL Channels.These bits determine the “P” part pulse pattern for ALL channels, 0 to 7.
LM96570 Bit(s) Description 11 IFE: Invert Fire Enable. This bit enables the Invert Fire Mode, which is used for harmonic imaging. 0 Invert Fire Mode Disabled. The programmed pulse pattern will be fired directly. 1 Invert Fire Mode Enabled. Each TX transmission will consist of two firings. First, the programmed pulse pattern will be fired directly (non-inverted). Second, after RX is completed, the pulse pattern will be inverted and fired again.
LM96570 Application Notes 30129708 FIGURE 13. REFERENCE CIRCUIT 21 www.national.
LM96570 4. Set PLLE (bit 10 of register 1Ah) to LOW 5. Set PLLE (bit 10 of register 1Ah) to HIGH Power DOWN Sequence: 1. Insure VIO (pin 19) always greater than VDDA (pin 15) & VDDC (pin 6) POWER-UP AND POWER-DOWN SEQUENCES Power UP Sequence: 1. Turn ON VIO (pin 19) & Hold RST (pin 8) HIGH 2. Turn ON VDDA (pin 15) and VDDC (pin 6) 3.
• Write the delay profile to each Channel (Registers 00-07h) with the following 22-bit data. The write timing diagram is similar to that shown in Figure 14, except for the register addresses and the 22-bit data depths. Channel Register Data Fire Delay Ch 0 Reg. 00h 00 000 00000000000000 000 b no delay Ch 1 Reg. 01h 00 000 00000000000010 001 b 2 coarse delays + 1 fine delay Ch 2 Reg. 02h 00 000 00000000000100 010 b 4 coarse delays + 2 fine delay Ch 3 Reg.
LM96570 30129710 FIGURE 15. Beamformer Output with Example 1A Parameters Example 1B (Code Excitation with Pulse Width Adjust) Example 1B is similar to example 1A, except that the Pulse Width Adjust feature is enabled for each Channel. Channels 0 to 7 of the beamformer is programmed such that each P output fires 1/2/3/4/5/6/7/0 fine phase(s) later than the N output and its pulse width is smaller than the N output by 2/4/6/8/10/12/14/0 fine delays, individually.
Register Data Programmed Fire Delay Ch 6 Reg. 06h 10 101 00000000001100 110 b 12CD + 6FD Ch 7 Reg. 07h 00 111 00000000001110 111 b 14CD + 7FD Actual Fire Delay* P to N Delay & P's Pulse Width P: 13CD + 5FD P fires 7FDs later than N. P's pulse width is smaller than N by 14FDs. N: 12CD + 6FD N: 14CD + 7FD P: 14CD + 7FD P fires at the same time as N. P's pulse width is the same as N. * These delays do not include the internal propagation delay relative to the TX_EN rising edge.
LM96570 STEP 3. • When the write operations are complete and the TX path is ready, pull “TX_EN“ high. After 6 ICLK (160MHz) cycles (37.5 ns) have passed, each channel will start to count its programmed delay profile. When it reaches the preset value, it will trigger the firing sequence. TX_EN should always remain high during the firing operation. See Figure 12 for the firing diagram. 30129712 FIGURE 17.
LM96570 STEP 3. All channels have the same pulse pattern. Write the following 8-bit pulse pattern to Register 18 and Register 19h. Channel Register Data P part Ch 0 - 7 Reg. 18h 1001 0110 b N part Ch 0 - 7 Reg. 19h 0110 1001 b STEP 4. When the writing operation is complete and the TX path is ready, pull “TX_EN“ high. After 6 ICLK (160MHz) clock cycles (37.5ns) have passed, each channel will start to count its programmed delay profile.
LM96570 Physical Dimensions inches (millimeters) unless otherwise noted 32-Lead LLP Package NS Package Number SQA32A www.national.
LM96570 Notes 29 www.national.
LM96570 Ultrasound Configurable Transmit Beamformer Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.
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