Datasheet

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LMC6001

www.ti.com

SNOS694H –MARCH 1995–REVISED MARCH 2013

LMC6001 Ultra Ultra-Low Input Current Amplifier

Check for Samples: LMC6001

FEATURES

DESCRIPTION

Featuring 100% tested input currents of 25 fA max.,

• (Max Limit, 25°C Unless Otherwise Noted)

low operating power, and ESD protection of 2000V,

• Input Current (100% Tested): 25 fA

the LMC6001 achieves a new industry benchmark for

• Input Current Over Temp.: 2 pA

low input current operational amplifiers. By tightly

controlling the molding compound, Texas Instruments

• Low Power: 750 μA

is able to offer this ultra-low input current in a lower

• Low V

: 350 μV

cost molded package.

• Low Noise: 22 nV/√Hz @1 kHz Typ.

To avoid long turn-on settling times common in other

low input current opamps, the LMC6001A is tested 3

APPLICATIONS

times in the first minute of operation. Even units that

• Electrometer Amplifier

meet the 25 fA limit are rejected if they drift.

• Photodiode Preamplifier

Because of the ultra-low input current noise of 0.13

• Ion Detector

fA/√Hz, the LMC6001 can provide almost noiseless

amplification of high resistance signal sources.

• A.T.E. Leakage Testing

Adding only 1 dB at 100 kΩ, 0.1 dB at 1 MΩ and 0.01

dB or less from 10 MΩ to 2,000 MΩ, the LMC6001 is

an almost noiseless amplifier.

The LMC6001 is ideally suited for electrometer

applications requiring ultra-low input leakage such as

sensitive photodetection transimpedance amplifiers

and sensor amplifiers. Since input referred noise is

only 22 nV/√Hz, the LMC6001 can achieve higher

signal to noise ratio than JFET input type

electrometer amplifiers. Other applications of the

LMC6001 include long interval integrators, ultra-high

input impedance instrumentation amplifiers, and

sensitive electrical-field measurement circuits.

Connection Diagrams

Figure 1. 8-Pin PDIP (Top View) Figure 2. 8-Pin TO-99 (Top View)

See P Package See LMC Package

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (14 pages)

PAGE 1
LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 LMC6001 Ultra Ultra-Low Input Current Amplifier Check for Samples: LMC6001 FEATURES DESCRIPTION • • • • • • Featuring 100% tested input currents of 25 fA max., low operating power, and ESD protection of 2000V, the LMC6001 achieves a new industry benchmark for low input current operational amplifiers. By tightly controlling the molding compound, Texas Instruments is able to offer this ultra-low input current in a lower cost molded package.
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) (2) Differential Input Voltage ±Supply Voltage (V+) + 0.3V, (V−) − 0.3V Voltage at Input/Output Pin Supply Voltage (V+ − V−) −0.3V to +16V Output Short Circuit to V+ See (3) (4) − See (3) Output Short Circuit to V (Soldering, 10 Sec.
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LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 DC Electrical Characteristics Limits in standard typeface ensured for TJ = 25°C and limits in boldface type apply at the temperature extremes. Unless otherwise specified, V+ = 5V, V− = 0V, VCM = 1.5V, and RL > 1M. Symbol IB Conditions Parameter Input Current IOS Input Offset Current VOS Input Offset Voltage Either Input, VCM = 0V, VS = ±5V Typical (1) Limits (2) LMC6001AI 10 5 VS = ±5V, VCM = 0V TCVOS Input Offset Voltage Drift 2.
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com DC Electrical Characteristics (continued) Limits in standard typeface ensured for TJ = 25°C and limits in boldface type apply at the temperature extremes. Unless otherwise specified, V+ = 5V, V− = 0V, VCM = 1.5V, and RL > 1M. Symbol IS Conditions Parameter Supply Current V+ = 5V, VO = 1.5V V+ = 15V, VO = 7.
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LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 Typical Performance Characteristics VS = ±7.5V, TA = 25°C, unless otherwise specified Input Current vs. Temperature Input Current vs. VCM VS = ±5V INPUT BIAS CURRENT 100 pA 10 pA 1 pA 100 fA 10 fA 1 fA 0 25 50 75 100 TEMPERATURE (°C) 125 Figure 3. Figure 4. Supply Current vs. Supply Voltage Input Voltage vs.Output Voltage Figure 5. Figure 6. Common Mode Rejection Ratio vs. Frequency Power Supply Rejection Ratio vs.
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, unless otherwise specified 6 Input Voltage Noise vs. Frequency Noise Figure vs. Source Resistance Figure 9. Figure 10. Output Characteristics Sourcing Current Output Characteristics Sinking Current Figure 11. Figure 12. Gain and Phase Response vs. Temperature (−55°C to +125°C) Gain and Phase Response vs. Capacitive Load with RL = 500 kΩ Figure 13. Figure 14.
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LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, unless otherwise specified Open Loop Frequency Response Inverting Small Signal Pulse Response Figure 15. Figure 16. Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response Figure 17. Figure 18. Non-Inverting Large Signal Pulse Response Stability vs. Capacitive Load Figure 19. Figure 20.
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com APPLICATIONS HINTS AMPLIFIER TOPOLOGY The LMC6001 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain.
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LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 Figure 22. LMC6001 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 22, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pullup resistor to V+ (Figure 23).
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com Figure 24. Examples of Guard Ring in PC Board Layout Figure 25. Inverting Amplifier Figure 26. Non-Inverting Amplifier Figure 27.
PAGE 11
LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board). Figure 28. Air Wiring Another potential source of leakage that might be overlooked is the device package. When the LMC6001 is manufactured, the device is always handled with conductive finger cots. This is to assure that salts and skin oils do not cause leakage paths on the surface of the package.
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LMC6001 SNOS694H – MARCH 1995 – REVISED MARCH 2013 www.ti.com R1 100k + 3500 ppm/°C R2 68.1k R3, 8 5k R4, 9 100k R5 36.5k R6 619k R7 97.6k D1 LM4040D1Z-2.5 C1 2.2 μF (1) Micro-ohm style 137 or similar Figure 29. pH Probe Amplifier ULTRA-LOW INPUT CURRENT INSTRUMENTATION AMPLIFIER Figure 30 shows an instrumentation amplifier that features high differential and common mode input resistance (>1014Ω), 0.01% gain accuracy at AV = 1000, excellent CMRR with 1 MΩ imbalance in source resistance.
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LMC6001 www.ti.com SNOS694H – MARCH 1995 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision F (March 2013) to Revision H • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 14
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