Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOIC 8

LMC6082

www.ti.com

SNOS630D –AUGUST 2000–REVISED MARCH 2013

LMC6082 Precision CMOS Dual Operational Amplifier

Check for Samples: LMC6082

FEATURES

DESCRIPTION

The LMC6082 is a precision dual low offset voltage

• (Typical Unless Otherwise Stated)

operational amplifier, capable of single supply

• Low Offset Voltage: 150 μV

operation. Performance characteristics include ultra

• Operates from 4.5V to 15V Single Supply

low input bias current, high voltage gain, rail-to-rail

output swing, and an input common mode voltage

• Ultra Low Input Bias Current: 10 fA

range that includes ground. These features, plus its

• Output Swing to Within 20 mV of Supply Rail,

low offset voltage, make the LMC6082 ideally suited

100k Load

for precision circuit applications.

• Input Common-Mode Range Includes V

−

Other applications using the LMC6082 include

• High Voltage Gain: 130 dB

precision full-wave rectifiers, integrators, references,

• Improved Latchup Immunity

and sample-and-hold circuits.

This device is built with TI's advanced Double-Poly

APPLICATIONS

Silicon-Gate CMOS process.

• Instrumentation Amplifier

For designs with more critical power demands, see

• Photodiode and Infrared Detector Preamplifier

the LMC6062 precision dual micropower operational

amplifier.

• Transducer Amplifiers

• Medical Instrumentation

PATENT PENDING

• D/A Converter

• Charge Amplifier for Piezoelectric Transducers

Connection Diagram

Figure 1. 8-Pin PDIP/SOIC Figure 2. Input Bias Current vs Temperature

Top View

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 LMC6082 Precision CMOS Dual Operational Amplifier Check for Samples: LMC6082 FEATURES DESCRIPTION • • • • • The LMC6082 is a precision dual low offset voltage operational amplifier, capable of single supply operation. Performance characteristics include ultra low input bias current, high voltage gain, rail-to-rail output swing, and an input common mode voltage range that includes ground.
PAGE 2
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
PAGE 4
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com DC Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified. Symbol VO Parameter Conditions V+ = 5V RL = 2 kΩ to 2.5V Output Swing LMC6082AM LMC6082AI LMC6082I Limit (2) Limit (2) Limit (2) 4.80 4.80 4.75 V 4.70 4.73 4.67 Min 0.13 0.13 0.20 V 0.
PAGE 5
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 AC Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25°C, Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified. Symbol Parameter Conditions in Input-Referred Current Noise F = 1 kHz T.H.D.
PAGE 6
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = ±7.5V, TA = 25°C, Unless otherwise specified 6 Distribution of LMC6082 Input Offset Voltage (TA = +25°C) Distribution of LMC6082 Input Offset Voltage (TA = −55°C) Figure 3. Figure 4. Distribution of LMC6082 Input Offset Voltage (TA = +125°C) Input Bias Current vs Temperature Figure 5. Figure 6. Supply Current vs Supply Voltage Input Voltage vs Output Voltage Figure 7. Figure 8.
PAGE 7
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, Unless otherwise specified Common Mode Rejection Ratio vs Frequency Power Supply Rejection Ratio vs Frequency Figure 9. Figure 10. Input Voltage Noise vs Frequency Output Characteristics Sourcing Current Figure 11. Figure 12. Output Characteristics Sinking Current Gain and Phase Response vs Temperature (−55°C to +125°C) Figure 13. Figure 14.
PAGE 8
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, Unless otherwise specified 8 Gain and Phase Response vs Capacitive Load with RL = 600Ω Gain and Phase Response vs Capacitive Load with RL = 500 kΩ Figure 15. Figure 16. Open Loop Frequency Response Inverting Small Signal Pulse Response Figure 17. Figure 18. Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response Figure 19. Figure 20.
PAGE 9
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, Unless otherwise specified Non-Inverting Large Signal Pulse Response Crosstalk Rejection vs Frequency Figure 21. Figure 22. Stability vs Capacitive Load, RL = 600Ω Stability vs Capacitive Load RL = 1 MΩ Figure 23. Figure 24.
PAGE 10
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com APPLICATIONS HINTS AMPLIFIER TOPOLOGY The LMC6082 incorporates a novel op-amp design topology that enables it to maintain rail to rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain.
PAGE 11
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 Figure 26. LMC6082 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 26, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pull up resistor to V+ Figure 27.
PAGE 12
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com Figure 28. Example of Guard Ring in P.C. Board Layout Inverting Amplifier Non-Inverting Amplifier Follower Figure 29.
PAGE 13
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board). Figure 30. Air Wiring Typical Single-Supply Applications (V+ = 5.0 VDC) The extremely high input impedance, and low power consumption, of the LMC6082 make it ideal for applications that require battery-powered instrumentation amplifiers.
PAGE 14
LMC6082 SNOS630D – AUGUST 2000 – REVISED MARCH 2013 www.ti.com Figure 33.
PAGE 15
LMC6082 www.ti.com SNOS630D – AUGUST 2000 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMC6082AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC6082IMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC6082IMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMC6082AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMC6082IMX SOIC D 8 2500 367.0 367.0 35.0 LMC6082IMX/NOPB SOIC D 8 2500 367.0 367.0 35.
PAGE 20
PAGE 21
PAGE 22
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.