Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - customised WQFN 16

LMH0394

www.ti.com

SNLS312L –AUGUST 2010–REVISED APRIL 2013

LMH0394 3G HD/SD SDI Low Power Extended Reach Adaptive Cable Equalizer

Check for Samples: LMH0394

FEATURES

DESCRIPTION

The LMH0394 3 Gbps HD/SD SDI Low Power

• SMPTE 424M, SMPTE 292M, SMPTE 344M,

Extended Reach Adaptive Cable Equalizer is

SMPTE 259M, and DVB-ASI Compliant

designed to equalize data transmitted over cable (or

• Equalized Cable Lengths (Belden 1694A):

any media with similar dispersive loss

200m at 2.97 Gbps, 220m at 1.485 Gbps, and

characteristics). The equalizer operates over a wide

400m at 270 Mbps

range of data rates from 125 Mbps to 2.97 Gbps and

supports SMPTE 424M, SMPTE 292M, SMPTE

• Ultra Low Power Consumption: 115 mW

344M, SMPTE 259M, and DVB-ASI standards.

(Normal Operation)

• Power Save Mode with Auto Sleep Control The LMH0394 provides extended cable reach with

improved immunity to crosstalk and ultra low power

(17 mW Typical Power Consumption in Power

consumption. The equalizer includes active sensing

Save Mode)

circuitry that ensures robust performance and

• Designed for Crosstalk Immunity

enhanced immunity to variations in the input signal

• Output De-Emphasis to Compensate for FR4

launch amplitude. The output driver offers

Board Trace Losses

programmable de-emphasis for up to 40” of FR4

trace losses. The LMH0394 includes power

• Digital and Analog Programmable MUTE

REF

management to further reduce power consumption

Threshold

when no input signal is present.

• Optional SPI Register Access

The LMH0394 supports two modes of operation. In

• Input Data Rates: 125 Mbps to 2.97 Gbps

pin mode, the LMH0394 operates with control pins to

• Internally Terminated 100Ω LVDS Outputs with

set its operating state, and is footprint compatible with

Programmable Output Common Mode Voltage

the LMH0384, LMH0344, and legacy SDI equalizers.

and Swing

In SPI mode, an optional SPI serial interface can be

used to access and configure multiple LMH0394

• Programmable Launch Amplitude Optimization

devices in a daisy-chain configuration. This allows

• Cable Length Indicator

programming the output common mode voltage and

• Single 2.5V Supply Operation

swing, output de-emphasis level, input launch

amplitude, and power management settings, as well

• 16-pin WQFN Package

as access to a cable length indicator and all pin mode

• Industrial Temperature Range: −40°C to +85°C

features.

• Footprint Compatible with the LMH0384 and

also the LMH0344, LMH0044, and LMH0074 in

Pin Mode

APPLICATIONS

• SMPTE 424M, SMPTE 292M, SMPTE 344M, and

SMPTE 259M Serial Digital Interfaces

• Broadcast Video Routers, Switchers, and

Distribution Amplifiers

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 LMH0394 3G HD/SD SDI Low Power Extended Reach Adaptive Cable Equalizer Check for Samples: LMH0394 FEATURES DESCRIPTION • The LMH0394 3 Gbps HD/SD SDI Low Power Extended Reach Adaptive Cable Equalizer is designed to equalize data transmitted over cable (or any media with similar dispersive loss characteristics). The equalizer operates over a wide range of data rates from 125 Mbps to 2.
PAGE 2
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com Typical Application (Pin Mode) Coaxial Cable LMH0394 3G SDI Adaptive Cable Equalizer LMH0341 3G SDI Deserializer 1.0 PF 75: SDO SDI SDI 5.6 nH TXOUT RXIN0 RXIN0 Reclocked Loopthrough TXOUT SDO 1.0 PF 75: RX[4:0] CD BYPASS AUTO SLEEP SPI_EN RXCLK MUTE To FPGA 5-bit LVDS + clk AEC- AEC+ 37.4: MUTE MUTEREF MUTEREF CD BYPASS AUTO SLEEP 1.
PAGE 3
LMH0394 SDI 3 SPI_EN 4 SCK VCC 13 LMH0394 (top view) 5 6 7 8 MUTEREF 2 14 CD SDI 15 AEC- 1 16 AEC+ VEE MOSI SNLS312L – AUGUST 2010 – REVISED APRIL 2013 VCC www.ti.com 12 MISO 11 SDO 10 SDO 9 SS DAP = VEE The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative power supply voltage.
PAGE 4
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS – Pin Mode (non-SPI) / SPI_EN = GND / LMH0344 Compatible Pin 4 Name I/O, Type Description 1 VEE Ground Negative power supply (ground). 2 SDI I, SDI Serial data true input. 3 SDI I, SDI Serial data complement input. 4 SPI_EN I, LVCMOS SPI register access enable. This pin has an internal pulldown. H = SPI register access mode. L = Pin mode.
PAGE 5
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 PIN DESCRIPTIONS – SPI Mode / SPI_EN = VCC Pin Name I/O, Type Description 1 VEE Ground Negative power supply (ground). 2 SDI I, SDI Serial data true input. 3 SDI I, SDI Serial data complement input. 4 SPI_EN I, LVCMOS SPI register access enable. This pin has an internal pulldown. H = SPI register access mode. L = Pin mode.
PAGE 6
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com DC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1) (2).
PAGE 7
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 AC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1). Symbol Parameter BRMIN Minimum Input Data Rate BRMAX Maximum Input Data Rate Conditions Reference Min SDI, SDI Typ 125 Units Mbps 2970 Mbps Jitter for Various Cable Lengths 2.97 Gbps, Belden 1694A, 0-100 meters (2) 0.2 UI 2.97 Gbps, Belden 1694A, 100-140 meters (2) 0.3 UI 2.
PAGE 8
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com SPI Interface AC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (1).
PAGE 9
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 SS (host) tSSSU tSSH tSSOF tSSH tSSOF tSSSU tPL tPH SCK (host) tH tSU MOSI (host) ³8x1´ 1 A6 A5 A4 A3 A2 A1 A0 ³16x1´ tOZD tOZD tODZ MISO Hi-Z (device) Hi-Z '21¶7 &$5( tOD tODZ 1 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 1 Hi-Z Figure 3.
PAGE 10
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com DEVICE OPERATION BLOCK DESCRIPTION The Equalizer Filter block is a multi-stage adaptive filter. If Bypass is high, the equalizer filter is disabled. The DC Restoration / Level Control block receives the differential signals from the equalizer filter block. This block incorporates a self-biasing DC restoration circuit to fully DC restore the signals. If Bypass is high, this function is disabled.
PAGE 11
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 In pin mode, CD and MUTE may be tied together to automatically mute the output when no input signal is present. AUTO SLEEP The auto sleep mode allows the LMH0394 to power down when no input signal is detected. If the AUTO SLEEP pin is set high, the LMH0394 goes into a deep power save mode when no signal is detected. The device powers on again once an input signal is detected.
PAGE 12
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com The LMH0394 output driver is equipped with programmable output de-emphasis to minimize inter-symbol interference caused by the loss dispersion from driving signals across PCB traces (see OUTPUT DRIVER ADJUSTMENTS AND DE-EMPHASIS SETTING in the SPI Register Access section). De-emphasis works with all combinations of output common mode voltage and output voltage swing settings to support DC coupling to the receiving device. Coaxial Cable 1.
PAGE 13
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 SPI REGISTER ACCESS Setting SPI_EN high enables the optional SPI register access mode. In SPI mode, the LMH0394 provides register access to all of its features along with a cable length indicator, programmable output de-emphasis, programmable output common mode voltage and swing, digital MUTEREF, and launch amplitude optimization. There are eight supported 8-bit registers in the device (see Table 1).
PAGE 14
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com MISO Device 2 Device 3 Device N LMH0394 LMH0394 LMH0394 LMH0394 MISO MOSI MISO SS MOSI SCK SS MISO SS MOSI SCK MISO SCK MOSI SS MOSI Device 1 SCK Host SCK SS Figure 7. SPI Daisy Chain System Architecture In a daisy-chain configuration of N LMH0394 devices, the host conceptually sees a shift register of length 16xN.
PAGE 15
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 SPI Daisy-Chain Read Figure 9 shows the SPI daisy-chain read for a daisy-chain of N devices. The SPI daisy-chain read is 32xN bits long, consisting of 16xN bits for the read transaction followed by 16xN bits for the dummy read transaction (all “1”s) to shift out the read data on the MISO output. The SS signal is driven low and SCK is toggled for 16xN clocks.
PAGE 16
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com SPI Daisy-Chain Read and Write Example The following example further clarifies LMH0394 SPI daisy-chain operation. Assume a daisy-chain of three LMH0394 devices (Device 1, Device 2, and Device 3), with Device 1 as the first device in the chain and Device 3 as the last device in the chain, as shown by the first three devices in Figure 7. Since there are three devices in the daisy-chain, each SPI transaction is 48-bits long.
PAGE 17
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 The offset voltage is adjustable via bits [5:4] of SPI register 01h. The default value for these register bits is “10” for an output offset of 1.2V. The output common mode voltage may be adjusted in 200 mV increments, from 0.8V to 1.2V. It can be set to “11” for the maximum offset voltage. At this maximum offset voltage setting, the outputs are referenced to the positive supply and the offset voltage is around 1.35V.
PAGE 18
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com APPLICATION INFORMATION APPLICATION CIRCUIT (SPI MODE) Figure 13 shows the application circuit for the LMH0394 in SPI mode. (Note: The application circuit shows an external capacitor connected between the AEC+ and AEC- pins as commonly configured in legacy equalizers. This capacitor is optional and not necessary for the LMH0394; the AEC+ and AEC- pins may be left unconnected with no change in performance.
PAGE 19
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 INTERFACING TO 3.3V SPI The LMH0394 may be controlled via optional SPI register access. The LMH0394 SPI pins support 2.5V LVCMOS logic levels and are compliant with JEDEC JESD8-5 (see DC Electrical Characteristics). Care must be taken when interfacing the SPI pins to other voltage levels. The 2.5V LMH0394 SPI pins may be interfaced to a 3.3V compliant SPI host by using a voltage divider or level translator.
PAGE 20
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 • • • www.ti.com Avoid sharp bends in the signal path; use 45° or radial bends. Place bypass capacitors close to each power pin, and use the shortest path to connect equalizer power and ground pins to the respective power or ground planes. Remove ground plane under input/output components to minimize parasitic capacitance. SPI Registers Table 1.
PAGE 21
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 Table 1. SPI Registers (continued) Address R/W Name Bits Field 01h R/W Output Driver 7:6 Output Swing 10 Output driver swing (VSSP-P). 00: VSSP-P = 400 mVP-P. 01: VSSP-P = 600 mVP-P. 10: VSSP-P = 700 mVP-P. 11: VSSP-P = 800 mVP-P. 5:4 Offset Voltage 10 Output driver offset voltage (common mode voltage). 00: VOS = 0.8V. 01: VOS = 1.0V. 10: VOS = 1.2V. 11: VOS referenced to positive supply.
PAGE 22
LMH0394 SNLS312L – AUGUST 2010 – REVISED APRIL 2013 www.ti.com Table 1. SPI Registers (continued) 22 Address R/W Name Bits Field 06h R Cable Length Indicator 7:0 Cable Length Indicator Cable Length Indicator (CLI), with 10% accuracy. 00000000: Short cable. ...... 11110111: Maximum cable. 11111000: Reserved. ...... 11111111: Reserved. 07h R Launch Amplitude Indication 7:2 Launch Amplitude Indication Indication of launch amplitude: 1% or 0.08 dB per step with 5% accuracy.
PAGE 23
LMH0394 www.ti.com SNLS312L – AUGUST 2010 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision K (April 2013) to Revision L • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 24
PACKAGE OPTION ADDENDUM www.ti.
PAGE 25
PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LMH0394SQ/NOPB WQFN RUM 16 LMH0394SQE/NOPB WQFN RUM LMH0394SQX/NOPB WQFN RUM SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 16 250 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 16 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH0394SQ/NOPB WQFN RUM 16 1000 213.0 191.0 55.0 LMH0394SQE/NOPB WQFN RUM 16 250 213.0 191.0 55.0 LMH0394SQX/NOPB WQFN RUM 16 4500 367.0 367.0 35.
PAGE 27
MECHANICAL DATA RUM0016A SQB16A (Rev A) www.ti.
PAGE 28
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.