Datasheet

LMH7220
www.ti.com SNOSAL3E –SEPTEMBER 2006–REVISED MAY 2013
Symbol Text Description
ΔV
O
Change in Output Offset Voltage Difference in Output Common Mode Voltage between logic ‘0’ and logic ‘1’
levels (See Figure 31)
V
OH
Output Voltage High High state single ended output voltage (Q or Q) (See Figure 30)
V
OL
Output Voltage Low Low state single ended output voltage (Q or Q) (See Figure 30)
V
ODH
Output Differential Voltage logic ‘1’ V
OH(Q)
– V
OL(Q)
(logic level ‘1’) (See Figure 31)
V
ODL
Output Differential Voltage logic ‘0’ V
OH(Q)
– V
OL(Q)
(logic level ‘0’) (See Figure 31)
V
OD
Average of V
ODH
and V
ODL
(V
ODH
+ V
ODL
) / 2
ΔV
OD
Change in V
OD
between ‘0’ and ‘1’ |V
ODH
– V
ODL
| (See Figure 31)
Hyst Hysteresis Difference in input switching levels for L to H and H to L transitions. (See
Figure 29)
I
SQG
, I
SQG
Short Circuit Current one output to GND Current that flows from one output to GND if shorted single ended
I
SQQ
Short Circuit Current outputs together Current flowing between output Q and output Q if shorted differentially
TR Maximum Toggle Rate Maximum frequency at which the outputs can toggle before V
OD
drops
under 50% of the nominal value.
PW Pulse Width Time from 50% of the rising edge of a signal to 50% of the falling edge
t
PDH
resp t
PDL
Propagation Delay Delay time between the moment the input signal crosses the switching
level L to H and the moment the output signal crosses 50% of the rising
edge of Q output (t
PDH
), or delay time between the moment the input signal
crosses the switching level H to L and the moment the output signal
crosses 50% of the falling edge of Q output (t
PDL
)
t
PDL
resp t
PDH
Delay time between the moment the input signal crosses the switching
level L to H and the moment the output signal crosses 50% of the falling
edge of Q output (t
PDL
), or delay time between the moment the input signal
crosses the switching level H to L and the moment the output signal
crosses 50% of the rising edge of Q output (t
PDH
)
t
PDLH
Average of t
PDH
and t
PDL
t
PDHL
Average of t
PDL
and t
PDH
t
PD
Average of t
PDLH
and t
PDHL
t
PDHd
resp t
PDLd
Delay time between the moment the input signal crosses the switching
level L to H and the zero crossing of the rising edge of the differential
output signal (t
PDHd
), or delay time between the moment the input signal
crosses the switching level H to L and the zero crossing of the falling edge
of the differential output signal (t
PDLd
)
Δt
PDLH
resp Δt
PDHL
Q to Q time skew Time skew between 50% levels of rising edge of Q output and falling edge
of Q output (Δt
PDLH
), or time skew between 50% levels of falling edge of Q
output and rising edge of Q output (Δt
PDHL
)
Δt
PD
Average Q to Q time skew Average of t
PDLH
and t
PDHL
for L to H and H to L transients
Δt
PDd
Average diff. time skew Average of t
PDHd
and t
PDLd
for L to H and H to L transients
t
OD-disp
Input overdrive dispersion Change in t
PD
for different overdrive voltages at the input pins
t
SR-disp
Input slew rate dispersion Change in t
PD
for different slew rates at the input pins
t
CM-disp
Input Common Mode dispersion Change in t
PD
for different common mode voltages at the input pins
t
r
/ t
rd
Output rise time (20% - 80%) Time needed for the (single ended or differential) output voltage to change
from 20% of its nominal value to 80%
t
f
/ t
fd
Output fall time (20% - 80%) Time needed for the (single ended or differential) output voltage to change
from 80% of its nominal value to 20%
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