Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOIC 8

LMP7707, LMP7708, LMP7709

www.ti.com

SNOSAW5B –JUNE 2007–REVISED MARCH 2013

LMP7707/LMP7708/LMP7709 Precision, CMOS Input, RRIO, Wide Supply Range

Decompensated Amplifiers

Check for Samples: LMP7707, LMP7708, LMP7709

FEATURES

DESCRIPTION

The LMP7707/LMP7708/LMP7709 devices are

• Unless Otherwise Noted, Typical Values at

single, dual, and quad low offset voltage, rail-to-rail

= 5V.

input and output precision amplifiers which each have

• Input Offset Voltage (LMP7707) ±200 µV (Max)

a CMOS input stage and a wide supply voltage

• Input Offset Voltage (LMP7708/LMP7709)

range. The LMP7707/LMP7708/LMP7709 are part of

the LMP™ precision amplifier family and are ideal for

±220 µV (Max)

sensor interface and other instrumentation

• Input Bias Current ±200 fA

applications. These decompensated amplifiers are

• Input Voltage Noise 9 nV/√Hz

stable at a gain of 6 and higher.

• CMRR 130 dB

The ensured low offset voltage of less than ±200 µV

• Open Loop Gain 130 dB

along with the ensured low input bias current of less

than ±1 pA make the LMP7707/LMP7708/LMP7709

• Temperature Range −40°C to 125°C

ideal for precision applications. The

• Gain Bandwidth Product (A

=10) 14 MHz

LMP7707/LMP7708/LMP7709 are built utilizing VIP50

• Stable at a Gain of 10 or Higher

technology, which allows the combination of a CMOS

• Supply Current (LMP7707) 715 µA

input stage and a supply voltage range of 12V with

rail-to-rail common mode voltage capability. The

• Supply Current (LMP7708) 1.5 mA

LMP7707/LMP7708/LMP7709 are the perfect choice

• Supply Current (LMP7709) 2.9 mA

in many applications where conventional CMOS parts

• Supply Voltage Range 2.7V to 12V

cannot operate due to the voltage conditions.

• Rail-to-Rail Input and Output

The unique design of the rail-to-rail input stage of

each of the LMP7707/LMP7708/LMP7709

APPLICATIONS

significantly reduces the CMRR glitch commonly

associated with rail-to-rail input amplifiers. Both sides

• High Impedance Sensor Interface

of the complimentary input stage have been trimmed,

• Battery Powered Instrumentation

thereby reducing the difference between the NMOS

• High Gain Amplifiers

and PMOS offsets. The output swings within 40 mV

of either rail to maximize the signal dynamic range in

• DAC Buffer

applications requiring low supply voltage.

• Instrumentation Amplifier

The LMP7707 is offered in the space-saving 5-pin

• Active Filters

SOT-23 and 8-pin SOIC packages, the LMP7708 is

offered in the 8-pin VSSOP and 8-pin SOIC

packages, and the quad LMP7709 is offered in the

14-pin TSSOP and 14-pin SOIC packages. These

small packages are ideal solutions for area

constrained PC boards and portable electronics.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2LMP is a trademark of Texas Instruments.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (40 pages)

PAGE 1
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 LMP7707/LMP7708/LMP7709 Precision, CMOS Input, RRIO, Wide Supply Range Decompensated Amplifiers Check for Samples: LMP7707, LMP7708, LMP7709 FEATURES DESCRIPTION • The LMP7707/LMP7708/LMP7709 devices are single, dual, and quad low offset voltage, rail-to-rail input and output precision amplifiers which each have a CMOS input stage and a wide supply voltage range.
PAGE 2
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Open Loop Frequency Response DECOMPENSATED OP AMP AOL UNITY-GAIN STABLE OP AMP Gmin fGBWP fd f1 fu f2 fu' Figure 1. Increased Bandwidth for Same Supply Current at AV> 10 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
PAGE 3
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 3V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2. Boldface limits apply at the temperature extremes.
PAGE 4
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com 3V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2. Boldface limits apply at the temperature extremes.
PAGE 5
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 5V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, and RL > 10 kΩ to V+/2. Boldface limits apply at the temperature extremes.
PAGE 6
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com ±5V Electrical Characteristics (1) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V. Boldface limits apply at the temperature extremes.
PAGE 7
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 ±5V Electrical Characteristics(1) (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = −5V, VCM = 0V, and RL > 10 kΩ to 0V. Boldface limits apply at the temperature extremes.
PAGE 8
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Connection Diagrams Top View OUT Top View 5 1 + V 2 IN- V 2 + IN+ IN+ 4 3 IN- Figure 2. LMP7707 5-Pin SOT-23 See DBV Package V - 3 6 + 5 NC + V OUT NC Figure 3. LMP7707 8-Pin SOIC See D Package Top View Figure 4. LMP7708 8-Pin VSSOP (See DGK Package) LMP7708 8-Pin SOIC (See D Package) Submit Documentation Feedback 7 - 4 Top View 8 8 1 NC Figure 5.
PAGE 9
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 Typical Performance Characteristics Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 Offset Voltage Distribution TCVOS Distribution 20 25 VS = 3V VS = 3V -40°C d TA d 125°C 16 PERCENTAGE (%) PERCENTAGE (%) 20 TA = 25°C 15 10 12 8 4 5 0 -200 0 -100 0 100 200 -3 -2 -1 0 TCVOS (PV/°C) Figure 6. Figure 7.
PAGE 10
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 -20 150 -40 -20 100 -40 -60 -60 -80 -80 VS = 3V 50 CMRR (dB) OFFSET VOLTAGE (PV) Offset Voltage vs. Temperature 200 0 -50 VS = 5V CMRR vs.
PAGE 11
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 Input Bias Current vs. VCM Input Bias Current vs. VCM 300 200 VS = 3V VS = 3V 200 100 IBIAS (pA) IBIAS (fA) 100 -40°C 0 85°C 0 -100 -100 -200 125°C 25°C -300 -200 0 0.5 1 2 1.5 2.5 0 3 0.5 1.5 1 2 Figure 18. 3 Figure 19. Input Bias Current vs.
PAGE 12
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 Supply Current vs. Supply Voltage (Per Channel) PSRR vs. Frequency 1.2 -PSRR VS = 3V 120 1 SUPPLY CURRENT (mA) -PSRR VS = 5V 100 PSRR (dB) +PSRR VS = 10V 80 -PSRR VS = 10V 60 40 +PSRR VS = 3V 10 +PSRR VS = 5V 100 25°C 0.8 0.6 -40°C 0.4 0.
PAGE 13
LMP7707, LMP7708, LMP7709 www.ti.
PAGE 14
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 Open Loop Gain vs. Output Voltage Swing Input Voltage Noise vs. Frequency 150 VS = 10V 100 80 VS = 3V 60 VS = 5V 40 130 120 RL = 10 k: 110 VS = 3V 100 90 80 20 1 10 RL = 2 k: 70 VS = 10V 0 100 1k 10k 60 500 100k FREQUENCY (Hz) Output Swing Low vs.
PAGE 15
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, VCM = VS/2, RL > 10 kΩ connected to (V++V−)/2 THD+N vs. Frequency THD+N vs. Output Voltage 100 1 VS = 5V VOUT = 4.5VPP RL = 100 k: Noise band = 500 kHz AV = +10 10 0.1 THD+N (%) THD+N (%) AV = +100 AV = +100 AV = +10 0.01 10 100 1k 10k 1 0.1 V = 5V S f = 1 kHz RL = 100 k: Noise band = 500 kHz 0.01 0.01 0.
PAGE 16
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com APPLICATION INFORMATION LMP7707/LMP7708/LMP7709 The LMP7707/LMP7708/LMP7709 devices are single, dual and quad low offset voltage, rail-to-rail input and output precision amplifiers each with a CMOS input stage and the wide supply voltage range of 2.7V to 12V. The LMP7707/LMP7708/LMP7709 have a very low input bias current of only ±200 fA at room temperature. The wide supply voltage range of 2.
PAGE 17
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 INPUT CAPACITANCE CMOS input stages inherently have low input bias current and higher input referred voltage noise. The LMP7707/LMP7708/LMP7709 enhances this performance by having the low input bias current of only ±200 fA, as well as a very low input referred voltage noise of 9 nV/√Hz. In order to achieve this a large input stage has been used.
PAGE 18
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 eni = 2 2 www.ti.
PAGE 19
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 SENSOR + IB RS VS V VIN+ + - + R1 - V R2 Figure 49. Noise Due to IBIAS USAGE OF DECOMPENSATED AMPLIFIERS This section discusses the differences between compensated and decompensated op amps and presents the advantages of decompensated amplifiers. In high gain applications decompensated amplifiers can be used without any changes compared to standard amplifiers.
PAGE 20
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Stability can be expressed in two different ways: Phase Margin This is the phase difference between the actual phase shift and 180°, at the point where the gain is 0 dB. Gain Margin This is the gain difference relative to 0 dB, at the frequency where the phase shift crosses the 180°.
PAGE 21
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 EXTERNAL COMPENSATION FOR GAINS LOWER THAN GMIN. This section explains how decompensated amplifiers can be used in configurations requiring a gain lower than GMIN. In the next sections the concept of the feedback factor is introduced. Subsequently, an explanation is given how stability can be determined using the frequency response curve of the op amp together with the feedback factor.
PAGE 22
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com For an inverting configuration: |ACL|(min) = Gmin - 1 (8) If R1 and RF and are chosen so that the closed loop gain is lower than the minimum gain required for stability, then 1/F intersects the open loop gain curve for a value that is lower than GMIN. For example, assume the GMIN is equal to 10 V/V (20 dB). This is shown as the dashed line in Figure 53.
PAGE 23
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 Proper selection of the value of RC results in the shifting of the 1/F function to GMIN or greater, thus fulfilling the condition for circuit stability. The compensation technique of reducing the loop gain may be used to stabilize the circuit for the values given in the previous example, that is GMIN = 20 dB and RF = R1 = 2 kΩ.
PAGE 24
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 VOUT VIN 1+ = 1+ www.ti.com RF R1 1 GF (12) By inspection of Equation 12, RC does not affect the ideal closed loop gain. In this example where RF = R1, the closed loop gain remains at 6 dB as long as GF >> 1. The closed loop gain curve is shown as the solid line in Figure 55. The addition of RC affects the circuit in the following ways: 1. 1/F is moved to a higher gain, resulting in overall system stability.
PAGE 25
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 RF R1 RC C + RP Figure 58.
PAGE 26
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com Note that the constraint 1/F ≥ Gmin needs to be satisfied only in the vicinity of the intersection of G and 1/F; 1/F can be shaped elsewhere as needed. Two rules must be satisfied in order to maintain adequate phase margin. Rule 1 The plot of 1/F should intersect with the plot of the open loop gain at a value larger than GMIN. At that point, the open loop gain G has a phase margin of 45°.
PAGE 27
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 This method uses bode plot approximation. Some fine-tuning may be needed to get the best results.
PAGE 28
LMP7707, LMP7708, LMP7709 SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 www.ti.com VOUT (0.5V/DIV) Figure 60 shows the results of the compensation of the LMP7707. 0 uncompensated 0 compensated 0 overcompensated TIME (1 Ps/DIV) Figure 60. Bench Results for Lead- Lag Compensation The top waveform shows the output response of a uncompensated LMP7707 using no external compensation components. This trace shows ringing and is unstable (as expected).
PAGE 29
LMP7707, LMP7708, LMP7709 www.ti.com SNOSAW5B – JUNE 2007 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision A (March 2013) to Revision B • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.
PAGE 31
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMP7707MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMP7707MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMP7707MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.
PAGE 33
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMP7707MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMP7707MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMP7707MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMP7708MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMP7708MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMP7708MME/NOPB VSSOP DGK 8 250 210.0 185.0 35.
PAGE 34
PAGE 35
PAGE 36
PAGE 37
PAGE 38
PAGE 39
PAGE 40
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.