Datasheet

LMP91002

SNIS163A –APRIL 2012–REVISED MARCH 2013

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REFCN -- Reference Control Register (address 0x11)

The parameters in the Reference control register allow the configuration of the Internal zero, and Reference

source. When the Reference source is external, the reference is provided by a reference voltage connected to

the VREF pin. In this condition the Internal Zero is defined as a percentage of VREF voltage instead of the

supply voltage.

Bit Name Function

Reference voltage source selection

7 REF_SOURCE 0 Internal (default)

1 external

Internal zero selection (Percentage of the source reference)

00 20%

[6:5] INT_Z

01 50% (default)

10 67%

[4] RESERVED RESERVED

Diagnostic step (Percentage of the source reference)

[3:0] DIAGNOSTIC 0000 0% (default)

0001 1%

MODECN -- Mode Control Register (address 0x12)

The Parameters in the Mode register allow the configuration of the Operation Mode of the LMP91002.

Bit Name Function

Shorting FET feature

7 FET_SHORT 0 Disabled (default)

1 Enabled

[6:3] RESERVED RESERVED

Mode of Operation selection

000 Deep Sleep (default)

[2:0] OP_MODE

010 Standby

011 3-lead amperometric cell

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