Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder WSON 6

0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00

100

EFFICIENCY (%)

LOAD CURRENT (A)

1.8Vout

3.3Vout

0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00

100

EFFICIENCY (%)

LOAD CURRENT (A)

1.8Vout

3.3Vout

LMR10520

www.ti.com

SNVS730B –OCTOBER 2011–REVISED APRIL 2013

LMR10520 SIMPLE SWITCHER

5.5Vin, 2.0A Step-Down Voltage Regulator in WSON

Check for Samples: LMR10520

FEATURES

DESCRIPTION

The LMR10520 regulator is a monolithic, high

• Input Voltage Range of 3V to 5.5V

frequency, PWM step-down DC/DC converter in a 6

• Output Voltage Range of 0.6V to 4.5V

Pin WSON package. It provides all the active

• Output Current up to 2A

functions to provide local DC/DC conversion with fast

transient response and accurate regulation in the

• 1.6MHz (LMR10520X) and 3 MHz (LMR10520Y)

smallest possible PCB area. With a minimum of

Switching Frequencies

external components, the LMR10520 is easy to use.

• Low Shutdown Iq, 30 nA Typical

The ability to drive 2.0A loads with an internal 150

• Internal Soft-Start

mΩ PMOS switch results in the best power density

available. The world-class control circuitry allows on-

• Internally Compensated

times as low as 30ns, thus supporting exceptionally

• Current-Mode PWM Operation

high frequency conversion over the entire 3V to 5.5V

• Thermal Shutdown

input operating range down to the minimum output

voltage of 0.6V. The LMR10520 is internally

• WSON-6 (3 x 3 x 0.8 mm) Packaging

compensated, so it is simple to use and requires few

• Fully Enabled for WEBENCH® Power Designer

external components. Even though the operating

frequency is high, efficiencies up to 93% are easy to

PERFORMANCE BENEFITS

achieve. External shutdown is included, featuring an

ultra-low stand-by current of 30 nA. The LMR10520

• Extremely Easy to Use

utilizes current-mode control and internal

• Tiny Overall Solution Reduces System Cost

compensation to provide high-performance regulation

over a wide range of operating conditions. Additional

APPLICATIONS

features include internal soft-start circuitry to reduce

inrush current, pulse-by-pulse current limit, thermal

• Point-of-Load Conversions from 3.3V, and 5V

shutdown, and output over-voltage protection.

Rails

• Space Constrained Applications

• Battery Powered Equipment

• Industrial Distributed Power Applications

• Power Meters

• Portable Hand-Held Instruments

System Performance

Efficiency vs Load Current - "X" V

= 5V Efficiency vs Load Current - "Y" V

= 5V

Figure 1. Figure 2.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

PAGE 1
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 LMR10520 SIMPLE SWITCHER® 5.5Vin, 2.0A Step-Down Voltage Regulator in WSON Check for Samples: LMR10520 FEATURES DESCRIPTION • • • • The LMR10520 regulator is a monolithic, high frequency, PWM step-down DC/DC converter in a 6 Pin WSON package. It provides all the active functions to provide local DC/DC conversion with fast transient response and accurate regulation in the smallest possible PCB area.
PAGE 2
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Typical Application FB EN GND LMR10520 R3 L1 VIN VOUT SW VIN R1 C1 D1 C2 C3 R2 Connection Diagram FB 1 GND 2 SW 3 6 EN DAP 5 VINA 4 VIND Figure 3. 6-Pin WSON Package See Package Number NGG0006A Table 1. Pin Descriptions 6-Pin WSON Pin 2 Name 1 FB 2 GND Function Feedback pin. Connect to external resistor divider to set output voltage. Signal and power ground pin.
PAGE 3
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN -0.5V to 7V FB Voltage -0.5V to 3V EN Voltage -0.5V to 7V SW Voltage -0.
PAGE 4
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (1) (2) VIN = 5V unless otherwise indicated under the Conditions column. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
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LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 Typical Performance Characteristics Unless stated otherwise, all curves taken at VIN = 5.0V with configuration in typical application circuit shown in Figure 22. TJ = 25°C, unless otherwise specified. η vs Load "Y" Vin = 5V, Vo = 3.3V & 1.8V 100 100 90 90 EFFICIENCY (%) EFFICIENCY (%) η vs Load "X" Vin = 5V, Vo = 1.8V & 3.3V 80 70 60 50 80 70 60 50 1.8Vout 3.3Vout 40 1.8Vout 3.3Vout 40 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.
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LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless stated otherwise, all curves taken at VIN = 5.0V with configuration in typical application circuit shown in Figure 22. TJ = 25°C, unless otherwise specified. Oscillator Frequency vs Temperature - "X" Oscillator Frequency vs Temperature - "Y" 3.45 OSCILLATOR FREQUENCY (MHz) OSCILLATOR FREQUENCY (MHz) 1.81 1.76 1.71 1.66 1.61 1.56 1.51 1.46 1.41 1.36 -45 -40 -10 20 50 3.35 3.25 3.
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LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless stated otherwise, all curves taken at VIN = 5.0V with configuration in typical application circuit shown in Figure 22. TJ = 25°C, unless otherwise specified. Line Regulation Vo = 1.8V, Io = 500mA VFB vs Temperature FEEBACK VOLTAGE (V) 0.610 0.605 0.600 0.595 0.590 -45 -40 -10 20 50 80 110 125 130 TEMPERATURE (ºC) Figure 16. Figure 17. Gain vs Frequency (Vin = 5V, Vo = 1.
PAGE 8
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Simplified Block Diagram EN VIN + ENABLE and UVLO ThermalSHDN I SENSE - + - I LIMIT + 1 .15 x VREF - OVPSHDN Ramp Artificial Control Logic cv FB S R R Q 1.6 MHz + I SENSE PFET - + DRIVER Internal - Comp SW VREF = 0.6V SOFT - START Internal - LDO GND Figure 20.
PAGE 9
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 APPLICATIONS INFORMATION Theory of Operation The following operating description of the LMR10520 will refer to the SIMPLIFIED BLOCK DIAGRAM (Figure 20) and to the waveforms in Figure 21. The LMR10520 supplies a regulated output voltage by switching the internal PMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator.
PAGE 10
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Soft-Start This function forces VOUT to increase at a controlled rate during start up. During soft-start, the error amplifier’s reference voltage ramps from 0V to its nominal value of 0.6V in approximately 600 µs. This forces the regulator output to ramp up in a controlled fashion, which helps reduce inrush current.
PAGE 11
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 Design Guide Inductor Selection The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN): D= VOUT VIN (1) The catch diode (D1) forward voltage drop and the voltage drop across the internal PMOS must be included to calculate a more accurate duty cycle.
PAGE 12
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com If ΔiL = 20% of 2A, the peak current in the inductor will be 2.4A. The minimum ensured current limit over all operating conditions is 2.4A. One can either reduce ΔiL, or make the engineering judgment that zero margin will be safe enough. The typical current limit is 3.25A. The LMR10520 operates at frequencies allowing the use of ceramic output capacitors without compromising transient response.
PAGE 13
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 Output Capacitor The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output ripple of the converter is: 'VOUT = 'IL RESR + 1 8 x FSW x COUT (11) When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate.
PAGE 14
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Calculating Efficiency, and Junction Temperature The complete LMR10520 DC/DC converter efficiency can be calculated in the following manner. K= POUT PIN (15) Or K= POUT POUT + PLOSS (16) Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed. Power loss (PLOSS) is the sum of two basic types of losses in the converter: switching and conduction.
PAGE 15
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 Another loss is the power required for operation of the internal circuitry: PQ = IQ x VIN (27) IQ is the quiescent operating current, and is typically around 3.3mA for the 1.6MHz frequency option. Typical Application power losses are: Table 2. Power Loss Tabulation VIN 5.0V VOUT 3.3V IOUT 1.75A POUT 5.78W VD 0.45V PDIODE 262mW FSW 1.6MHz IQ TRISE 3.3mA PQ 16.
PAGE 16
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Thermal Definitions TJ = Chip junction temperature TA = Ambient temperature RθJC = Thermal resistance from chip junction to device case RθJA = Thermal resistance from chip junction to ambient air Heat in the LMR10520 due to internal power dissipation is removed through conduction and/or convection. Conduction: Heat transfer occurs through cross sectional areas of material.
PAGE 17
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 The first step is to determine RθJA of the application. The LMR10520 has over-temperature protection circuitry. When the silicon temperature reaches 165°C, the device stops switching. The protection circuitry has a hysteresis of about 15°C. Once the silicon temperature has decreased to approximately 150°C, the device will start to switch again.
PAGE 18
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com FB 1 GND 2 6 EN GND 5 VINA PLANE SW 3 4 VIND Figure 25. 6-Lead WSON PCB Dog Bone Layout LMR10520X Design Example 1 FB EN R3 VIN = 5V C1 LMR10520 100k GND L1 VIN SW 2.2 PH 3.5A 22 PF 10V D1 2A 20V VO = 1.2V @ 2.0A R1 15k C2 2 x 22 PF 6.3V R2 15k Figure 26. LMR10520X (1.6MHz): Vin = 5V, Vo = 1.2V at 2.0A LMR10520X Design Example 2 FB EN VIN = 5V R3 100k LMR10520 VIN GND L1 SW 2.2 PH 2.
PAGE 19
LMR10520 www.ti.com SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 LMR10520Y Design Example 3 FB EN VIN = 5V R3 100k LMR10520 GND L1 VIN SW VO = 3.3V @ 2.0A 3.3 PH 3.3A C1 22 PF 10V R1 45.3k D1 2A 20V C2 R2 10k 2 x 22 PF 6.3V Figure 28. LMR10520Y (3MHz): Vin = 5V, Vo = 3.3V at 2.0A LMR10520Y Design Example 4 FB EN VIN = 5V R3 100k LMR10520 GND L1 VIN SW VO = 1.2V @ 2.0A 4.7 PH 2.7A C1 22 PF 10V R1 10k D1 2A 20V C2 R2 10k 2 x 22 PF 6.3V Figure 29.
PAGE 20
LMR10520 SNVS730B – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision A (April 2013) to Revision B • 20 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LMR10520XSD/NOPB WSON NGG 6 LMR10520XSDE/NOPB WSON NGG LMR10520XSDX/NOPB WSON NGG LMR10520YSD/NOPB WSON LMR10520YSDE/NOPB LMR10520YSDX/NOPB SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 6 250 178.0 12.4 3.3 3.3 1.0 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR10520XSD/NOPB WSON NGG 6 1000 213.0 191.0 55.0 LMR10520XSDE/NOPB WSON NGG 6 250 213.0 191.0 55.0 LMR10520XSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LMR10520YSD/NOPB WSON NGG 6 1000 213.0 191.0 55.0 LMR10520YSDE/NOPB WSON NGG 6 250 213.0 191.0 55.0 LMR10520YSDX/NOPB WSON NGG 6 4500 367.0 367.
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MECHANICAL DATA NGG0006A SDE06A (Rev A) www.ti.
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