Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder TSOT 23 6

0.0 0.1 0.2 0.3 0.4 0.5 0.6

100

EFFICIENCY (%)

LOAD CURRENT (A)

1.2Vout

3.3Vout

0.0 0.1 0.2 0.3 0.4 0.5 0.6

100

EFFICIENCY (%)

LOAD CURRENT (A)

1.2Vout

3.3Vout

LMR14206

www.ti.com

SNVS733D –OCTOBER 2011–REVISED APRIL 2013

LMR14206 SIMPLE SWITCHER

42Vin, 0.6A Step-Down Voltage Regulator in SOT-23

Check for Samples: LMR14206

FEATURES

DESCRIPTION

The LMR14206 is a PWM DC/DC buck (step-down)

• Input Voltage Range of 4.5V to 42V

regulator. With a wide input range from 4.5V-42V,

• Output Voltage Range of 0.765V to 34V

they are suitable for a wide range of applications

• Output Vurrent up to 0.6A

such as power conditioning from unregulated

sources. They feature a low R

DSON

(0.9Ω typical)

• 1.25 MHz Switching Frequency

internal switch for maximum efficiency (85% typical).

• Low Shutdown Iq, 16 µA Typical

Operating frequency is fixed at 1.25 MHz allowing the

• Short Circuit Protected

use of small external components while still being

able to have low output voltage ripple. Soft-start can

• Internally Compensated

be implemented using the shutdown pin with an

• Soft-Start Function

external RC circuit allowing the user to tailor the soft-

• Thin 6-Pin SOT Package (2.97 x 1.65 x 1mm)

start time to a specific application.

• Fully Enabled for WEBENCH® Power Designer

The LMR14206 is optimized for up to 600 mA load

current with a 0.765V nominal feedback voltage.

PERFORMANCE BENEFITS

Additional features include: thermal shutdown, V

• Tight Accuracy for Powering Digital ICs

under-voltage lockout, and gate drive under-voltage

• Extremely Easy to Use

lockout. The LMR14206 is available in a low profile 6-

pin SOT package.

• Tiny Overall Solution Reduces System Cost

APPLICATIONS

• Point-of-Load Conversions from 5V, 12V, and

24V Rails

• Space Constrained Applications

• Battery Powered Equipment

• Industrial Distributed Power Applications

• Power Meters

• Portable Hand-Held Instruments

System Performance

Efficiency vs Load Current Efficiency vs Load Current

= 12V, V

OUT

= 1.2V and 3.3V V

= 24V, V

OUT

= 1.2V and 3.3V

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (17 pages)

PAGE 1
LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 LMR14206 SIMPLE SWITCHER® 42Vin, 0.6A Step-Down Voltage Regulator in SOT-23 Check for Samples: LMR14206 FEATURES DESCRIPTION • • • • • • • • • • The LMR14206 is a PWM DC/DC buck (step-down) regulator. With a wide input range from 4.5V-42V, they are suitable for a wide range of applications such as power conditioning from unregulated sources. They feature a low RDSON (0.9Ω typical) internal switch for maximum efficiency (85% typical).
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LMR14206 SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com CBOOT L1 VOUT LMR14206 VIN VIN CB SHDN SW GND FB D1 R1 R2 CIN COUT Figure 1. Connection Diagram LMR14206 CB 1 GND 2 FB 3 PIN 1 ID 6 SW 5 VIN 4 SHDN Figure 2. 6-Pin SOT (Top View) See DDC Package PIN DESCRIPTIONS 2 Pin Name 1 CB 2 GND 3 FB 4 SHDN Function SW FET gate bias voltage. Connect CBOOT cap between CB and SW. Ground connection.
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LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN -0.3V to +45V SHDN -0.3V to (VIN+0.3V) <45V SW Voltage -0.3V to +45V CB Voltage above SW Voltage 7V FB Voltage -0.
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LMR14206 SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com Electrical Characteristics Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature Range ( TJ = −40°C to +125°C). Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes only.
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LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 Typical Performance Characteristics Input UVLO vs. Temperature SHDN Pin Current vs. SHDN Pin Voltage Figure 3. Figure 4. Switching Node and Output Voltage Waveforms Load Transient Waveforms VIN = 12V, VOUT = 3.3V, IOUT = 200 mA Top trace: VOUT, 10 mV/div, AC Coupled Bottom trace: SW, 5V/div, DC Coupled T = 1 µs/div Figure 5. VIN = 12V, VOUT = 3.
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LMR14206 SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 www.ti.
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LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 APPLICATION INFORMATION PROTECTION The LMR14206 has dedicated protection circuitry running during normal operation to protect the IC. The thermal shutdown circuitry turns off the power device when the die temperature reaches excessive levels. The UVLO comparator protects the power device during supply power startup and shutdown to prevent operation at voltages less than the minimum input voltage.
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LMR14206 SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current.
PAGE 9
LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 LAYOUT CONSIDERATIONS To reduce problems with conducted noise pick up, the ground side of the feedback network should be connected directly to the GND pin with its own connection. The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin. The input bypass capacitor CIN must be placed close to the VIN pin.
PAGE 10
LMR14206 SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 www.ti.com L1 47 PH CBOOT LMR14206 12V OUT 0.15 PF 15V to 42V IN VIN CB SHDN SW GND FB D1 60V 1A R1 14.7k CIN 2.2 PF COUT 22 PF R2 1k Figure 11. Application Circuit, 12V Output CBOOT LMR14206 L1 47 PH 15V OUT 0.15 PF 18V to 42V IN VIN CB SHDN SW GND FB D1 60V 1A R1 28k CIN 2.2 PF COUT 22 PF R2 1.5k Figure 12. Application Circuit, 15V Output L1 10 PH CBOOT LMR14206 0.8V OUT 0.15 PF 4.
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LMR14206 www.ti.com SNVS733D – OCTOBER 2011 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision C (April 2013) to Revision D • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LMR14206XMK/NOPB SOT DDC 6 LMR14206XMKE/NOPB SOT DDC LMR14206XMKX/NOPB SOT DDC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR14206XMK/NOPB SOT DDC 6 1000 210.0 185.0 35.0 LMR14206XMKE/NOPB SOT DDC 6 250 210.0 185.0 35.0 LMR14206XMKX/NOPB SOT DDC 6 3000 210.0 185.0 35.
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