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OUT

C = 200pF

SAMPLE

CLOCK

LMV341-N, LMV342-N, LMV344-N

www.ti.com

SNOS990G –APRIL 2002–REVISED MARCH 2013

LMV341-N/LMV342-N/LMV344-N Single with Shutdown/Dual/Quad General Purpose, 2.7V,

Rail-to-Rail Output, 125°C, Operational Amplifiers

Check for Samples: LMV341-N, LMV342-N, LMV344-N

FEATURES

DESCRIPTION

The LMV341-N/LMV342-N/LMV344-N are single,

(Typical 2.7V Supply Values; Unless Otherwise

dual, and quad low voltage, low power Operational

Noted)

Amplifiers. They are designed specifically for low

• Ensured 2.7V and 5V Specifications

voltage portable applications. Other important product

• Input Referred Voltage Noise (@ 10kHz)

characteristics are low input bias current, rail-to-rail

output, and wide temperature range.

29nV/√Hz

• Supply Current (per Amplifier) 100μA

The patented class AB turnaround stage significantly

reduces the noise at higher frequencies, power

• Gain Bandwidth Product 1.0MHz

consumption, and offset voltage. The PMOS input

• Slew Rate 1.0V/μs

stage provides the user with ultra-low input bias

• Shutdown Current (LMV341-N) 45pA

current of 20fA (typical) and high input impedance.

• Turn-On Time from Shutdown (LMV341-N) 5μs

The industrial-plus temperature range of −40°C to

• Input Bias Current 20fA

125°C allows the LMV341-N/LMV342-N/LMV344-N to

accommodate a broad range of extended

APPLICATIONS environment applications. LMV341-N expands Texas

Instrument's Silicon Dust amplifier portfolio offering

• Cordless/Cellular Phones

enhancements in size, speed, and power savings.

• Laptops

The LMV341-N/LMV342-N/LMV344-N are specified

to operate over the voltage range of 2.7V to 5.5V and

• PDAs

all have rail-to-rail output.

• PCMCIA/Audio

The LMV341-N offers a shutdown pin that can be

• Portable/Battery-Powered Electronic

used to disable the device. Once in shutdown mode,

Equipment

the supply current is reduced to 45pA (typical). The

• Supply Current Monitoring

LMV341-N/LMV342-N/LMV344-N have 29nV Voltage

• Battery Monitoring

Noise at 10KHz, 1MHz GBW, 1.0V/μs Slew Rate,

0.25mVos, and 0.1μA shutdown current (LMV341-N.)

• Buffer

• Filter

The LMV341-N is offered in the tiny 6-Pin SC70

package, the LMV342-N in space saving 8-Pin

• Driver

VSSOP and SOIC, and the LMV344-N in 14-Pin

TSSOP and SOIC. These small package amplifiers

offer an ideal solution for applications requiring

minimum PC board footprint. Applications with area

constrained PC board requirements include portable

electronics such as cellular handsets and PDAs.

Sample and Hold Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 LMV341-N/LMV342-N/LMV344-N Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail Output, 125°C, Operational Amplifiers Check for Samples: LMV341-N, LMV342-N, LMV344-N FEATURES DESCRIPTION 1 (Typical 2.7V Supply Values; Unless Otherwise Noted) 2 • • • • • • • • Ensured 2.7V and 5V Specifications Input Referred Voltage Noise (@ 10kHz) 29nV/√Hz Supply Current (per Amplifier) 100μA Gain Bandwidth Product 1.
PAGE 2
LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance (3) Machine Model 200V Human Body Model 2000V Differential Input Voltage + ± Supply Voltage − Supply Voltage (V -V ) 6.
PAGE 3
LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 2.7V DC Electrical Characteristics (1) Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Conditions Input Offset Voltage Min Typ Max LMV341-N 0.25 4 4.5 LMV342-N/LMV344-N 0.55 5 5.5 (2) (3) TCVOS Input Offset Voltage Average Drift 1.7 IB Input Bias Current 0.
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LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com 2.7V AC Electrical Characteristics (1) Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ (2) (3) Max Units (2) SR Slew Rate RL = 10kΩ (4) 1.0 V/μs GBW Gain Bandwidth Product RL = 100kΩ, CL = 200pF 1.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 5V DC Electrical Characteristics(1) (continued) Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter VO Conditions Output Swing Min (2) RL = 2kΩ to 2.
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LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics Supply Current vs. Supply Voltage (LMV341-N) Input Current vs. Temperature 150 1000 VS = 5V 100 130 125°C INPUT CURRENT (pA) SUPPLY CURRENT (PA) 140 85°C 120 110 100 90 80 25°C 70 10 1 .1 .01 -40°C 60 50 2.5 3 3.5 4.5 4 SUPPLY VOLTAGE (V) .001 -40 -20 5 0 20 40 60 80 100 120 140 TEMPERATURE (°) Figure 4. Figure 5. Output Voltage Swing vs.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) ISINK vs. VOUT -40°C VS = 5V -40°C VS = 2.7V ISINK vs. VOUT 100 100 10 10 25°C ISINK (mA) 25°C ISINK (mA) 1 0.1 125°C 125°C 1 85°C 0.1 0.01 85°C 0.001 0.001 0.01 0.1 1 0.01 0.001 10 0.01 0.1 OUTPUT VOLTAGE REFERENCED TO V (V) Figure 10. Figure 11. VOS vs. VCM VOS vs. VCM 3 3 VS = 2.7V VS = 5V -40°C 2.5 -40°C 2.
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LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) CMRR vs. Frequency 80 VS = 5V 70 PSRR vs. Frequency 100 V = 5V, S 90 PSRR VIN = VS/2 RL = 5k: 80 VS = 2.7V, +PSRR 70 PSRR (dB) CMRR (dB) 60 50 VS = 2.7V 40 30 RL = 5k: 60 50 VS = 5V, +PSRR 40 30 20 20 10 10 VS = 2.7V, PSRR 10k 1k 0 0 100 10k 1k 100k 100 1M FREQUENCY (Hz) Figure 17. Input Voltage Noise vs. frequency Slew Rate vs.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) THD+N vs. Frequency THD+N vs. VOUT 10 10 f = 10KHz AV = +10 1 RL = 600: VS = 2.7V, AV = +10 VS = 2.7V, VO = 1VPP THD+N (%) THD+N (%) 1 VS = 5V, VO = 2.5VPP 0.1 AV = +1 VS = 5V, AV = +10 0.1 0.01 VS = 5V, AV = +1 VS = 2.7V, AV = +1 VS = 5V, VO = 1VPP VS = 2.7V, VO = 1VPP 0.001 10 1 10k 100 1k FREQUENCY (Hz) 0.01 0.00 1 100k 0.0 1 0.1 Figure 22. Figure 23.
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LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Gain and Phase vs. CL Stability vs. Capacitive Load PHASE VS = ±2.5V CL = 0 3.5 CL = 1000pF 60 CL = 500pF CL = 100pF 40 40 GAIN 20 20 CL = 0 0 0 CL = 1000pF CL = 500pF -20 -20 CL = 100pF VS = 5V -40 PHASE (°) 60 -40 CAPACITIVE LOAD (nF) 80 80 GAIN (dB) 4 100 10k 1k VO = 100mVPP 2.5 2 1.5 1 0.5 -1.5 -1 -0.5 0 VO (V) 0.5 1 1.5 Figure 29.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) INPUT SIGNAL Non-Inverting Small Signal Pulse Response RL = 2k: VS = ±2.5V OUTPUT SIGNAL (50 mV/div) TA = 125°C (1 V/div) OUTPUT SIGNAL INPUT SIGNAL Non-Inverting Large Signal Pulse Response TA = -40°C RL = 2k: VS = ±2.
PAGE 12
LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Inverting Small Signal Pulse Response INPUT SIGNAL OUTPUT SIGNAL (50 mV/ div) (1 V/div) OUTPUT SIGNAL INPUT SIGNAL Inverting Large Signal Pulse Response TA = 125°C RL = 2k: VS = ±2.5V TA = -40°C RL = 2k: VS = ±2.5V TIME (4 Ps/div) Figure 41. Inverting Large Signal Pulse Response Crosstalk Rejection vs. Frequency INPUT SIGNAL 200 VS = ±2.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 APPLICATION SECTION LMV341-N/LMV342-N/LMV344-N The LMV341-N/LMV342-N/LMV344-N family of amplifiers features low voltage, low power, and rail-to-rail output operational amplifiers designed for low voltage portable applications. The family is designed using all CMOS technology. This results in an ultra low input bias current. The LMV341-N has a shutdown option, which can be used in portable devices to increase battery life.
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LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com Figure 45 shows the schematic of a simple sample and hold circuit. When the sample clock is high the first amplifier is in normal operation mode and the second amplifier acts as a buffer. The capacitor, which appears as a load on the first amplifier, will be charging at this time. The voltage across the capacitor is that of the noninverting input of the first amplifier since it is connected as a voltage-follower.
PAGE 15
LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 RL = 600: VOUT (1 V/div) VSHDN VS = 5V TIME (1 Ps/div) Figure 47. Turn-off Time + V + VOUT SHDN + - VIN = VS/2 Figure 48. Turn-on Time V + + VOUT SHDN VIN = VS/2 + - RL = 600: Figure 49. Turn-off Time Low Input Bias Current The LMV341-N/LMV342-N/LMV344-N Amplifiers have a PMOS input stage. As a result, they will have a much lower input bias current than devices with BJT input stages.
PAGE 16
LMV341-N, LMV342-N, LMV344-N SNOS990G – APRIL 2002 – REVISED MARCH 2013 www.ti.com 200 VS = 5V TA = 25°C INPUT BIAS (fA) 100 0 -100 -200 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 VCM (V) Figure 50. Input Bias Current vs.
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LMV341-N, LMV342-N, LMV344-N www.ti.com SNOS990G – APRIL 2002 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision F (March 2013) to Revision G • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LMV341MG/NOPB SC70 DCK 6 1000 178.0 LMV341MGX/NOPB SC70 DCK 6 3000 LMV342MAX SOIC D 8 2500 LMV342MAX/NOPB SOIC D 8 LMV342MM/NOPB VSSOP DGK LMV342MMX/NOPB VSSOP LMV344MAX/NOPB SOIC LMV344MTX LMV344MTX/NOPB B0 (mm) K0 (mm) P1 (mm) 8.4 2.25 2.45 1.2 4.0 178.0 8.4 2.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV341MG/NOPB SC70 DCK 6 1000 210.0 185.0 35.0 LMV341MGX/NOPB SC70 DCK 6 3000 210.0 185.0 35.0 LMV342MAX SOIC D 8 2500 367.0 367.0 35.0 LMV342MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMV342MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV342MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.