Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SC 70 5

-400 -300 -200 -100 0 100 200 300 400

PERCENTAGE (%)

OFFSET VOLTAGE (PV)

= +5V

= -5V

= 0V

= 25°C

UNITS TESTED = 12,000

180

100

10k 1M 100M

FREQUENCY (Hz)

-60

GAIN (dB)

10M100k

150

120

-30

180

-60

150

120

-30

PHASE

(

)

GAIN

PHASE

= +6V

= -6V

= 10 k:

= 20 pF

LMV641

www.ti.com

SNOSAW3C –SEPTEMBER 2007–REVISED FEBRUARY 2013

LMV641 10 MHz, 12V, Low Power Amplifier

Check for Samples: LMV641

FEATURES

DESCRIPTION

The LMV641 is a low power, wide bandwidth

• Guaranteed 2.7V, and ±5V Performance

operational amplifier with an extended power supply

• Low Power Supply Current 138 µA

voltage range of 2.7V to 12V.

• High Unity Gain Bandwidth 10 MHz

It features 10 MHz of gain bandwidth product with

• Max Input Offset Voltage 500 µV

unity gain stability on a typical supply current of 138

• CMRR 120 dB

μA. Other key specifications are a PSRR of 105 dB,

CMRR of 120 dB, V

of 500 μV, input referred

• PSRR 105 dB

voltage noise of 14 nV/ , and a THD of 0.002%.

• Input Referred Voltage Noise 14 nV/√Hz

This amplifier has a rail-to-rail output stage, and a

• 1/f Corner Frequency 4 Hz

common mode input voltage which includes the

negative supply.

• Output Swing with 2 kΩ Load 40 mV from Rail

• Total Harmonic Distortion 0.002% @ 1kHz, 2kΩ

The LMV641 operates over a temperature range of

−40°C to +125°C and is offered in the board space

• Temperature Range −40°C to 125°C

saving 5-Pin SC70, SOT-23, and 8-Pin SOIC

packages.

APPLICATIONS

• Portable equipment

• Battery powered systems

• Sensors and instrumentation

Figure 1. Offset Voltage Distribution Figure 2. Open Loop Gain and Phase vs.

Frequency

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 LMV641 10 MHz, 12V, Low Power Amplifier Check for Samples: LMV641 FEATURES DESCRIPTION • • • • • • • • • • • The LMV641 is a low power, wide bandwidth operational amplifier with an extended power supply voltage range of 2.7V to 12V. 1 Guaranteed 2.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 Absolute Maximum Ratings ESD Tolerance www.ti.com (1) (2) (3) Human Body Model 2000V Machine Model 200V Differential Input VID ±0.3V Supply Voltage (VS = V+ - V−) 13.2V V+ +0.3V, V− −0.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 2.7V DC Electrical Characteristics (continued) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7V, V− = 0V, VO = VCM = V+/2, and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol PSRR CMVR Min Typ 2.7V ≤ V+ ≤ 10V, VCM = 0.5 94.5 92.5 105 2.7V ≤ V+ ≤ 12V, VCM = 0.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com 10V DC Electrical Characteristics (continued) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 10V, V− = 0V,VO = VCM = V+/2, and RL > 1 MΩ. Boldface limits apply at the temperature extremes. Symbol PSRR CMVR Parameter Conditions Min Typ 2.7V ≤ V+ ≤ 10V, VCM = 0.5V 94.5 92.5 105 2.7V ≤ V+ ≤ 12V, VCM = 0.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 Typical Performance Characteristics Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. Supply Current vs. Supply Voltage Offset Voltage vs. Supply Voltage 220 40 125°C 20 180 OFFSET VOLTAGE (PV) SUPPLY CURRENT (PA) 200 160 25°C 140 120 -40°C 100 80 0 25°C -20 -40 125°C -60 -80 60 40 -40°C 2 3 4 5 6 7 8 9 -100 10 11 12 2 3 4 SUPPLY VOLTAGE (V) 6 8 9 10 11 12 Figure 6.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. Offset Voltage Distribution 20 UNITS TESTED = 12,000 UNITS TESTED = 12,000 V = +1.35V 18 PERCENTAGE (%) TA = 25°C 12 10 8 6 VCM = 0V 14 10 8 6 4 4 2 0 TA = 25°C 12 2 0 -400 -300 -200 -100 - V = -5V 16 VCM = 0V 14 + V = +5V 18 - V = -1.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. 180 PHASE 120 GAIN 60 CL = 50 pF 30 30 + V = +1.35V - -30 V = -1.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. THD+N vs. Frequency THD+N vs. Frequency 0.1 0.1 + V = +5V - V = -5V VIN = 1 VPP 0.01 AV = +2 THD+N (%) THD+N (%) RL = 2 k: 0.01 RL = 10 k: RL = 2 k: + 0.001 V = +1.35V RL = 10 k: - V = -1.35V VIN = 1 VPP AV = +2 0.001 10 100 10k 1k 100k 0.0001 10 100 FREQUENCY (Hz) 1k 10k Figure 23. Figure 24.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. Sourcing Current vs. VOUT 25 45 + V = +1.35V 40 V = -1.35V 20 + V = +1.35V 25°C - - V = -1.35V 35 -40°C 30 -40°C 15 10 ISINK (mA) ISOURCE (mA) Sinking Current vs. VOUT 125°C 25 25°C 20 125°C 15 10 5 5 0 0 0 0.5 1 1.5 2 2.5 1.5 2 2.5 VOUT FROM RAIL (V) Figure 29. Figure 30.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, V+ = 10V, V− = 0V, VCM = VS/2. Output Swing High vs. Supply Voltage Output Swing Low vs.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 APPLICATION INFORMATION ADVANTAGES OF THE LMV641 Low Voltage and Low Power Operation The LMV641 has performance guaranteed at supply voltages of 2.7V and 10V. It is guaranteed to be operational at all supply voltages between 2.7V and 12.0V. The LMV641 draws a low supply current of 138 µA. The LMV641 provides the low voltage and low power amplification which is essential for portable applications.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com An op amp, ideally, has a dominant pole close to DC which causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains the same until the op amp's unity gain bandwidth, then the op amp is stable.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 Compensation by External Resistor In some applications it is essential to drive a capacitive load without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation is shown in Figure 42. A resistor, RISO, is placed in series between the load capacitance and the output.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com In this circuit, the use of a 9-volt alkaline battery exploits the LMV641’s high voltage and low supply current for a low power, portable current sensing application. The sensor converts an incident magnetic field (via the magnetic flux linkage) in the sensitive direction, to a balanced voltage output.
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LMV641 www.ti.com VSIG = VEXC x SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 'R R (2) Since ΔR is proportional to the field strength, BS, the amount of output voltage from the sensor is a function of sensor sensitivity, S. This expression can rewritten as VSIG = VEXC · S · BS, where S = material constant (nominally 1 mV/V/gauss) BS = magnetic flux in gauss A simplified schematic of a single op amp, differential amplifier is shown in Figure 45.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 BW-3 dB = www.ti.com GAIN-BANDWIDTH PRODUCT AVCL = 10 MHz = 431 kHz 23.2 580 k: SENSOR 500: 24.5 k: 4.446V - 4.554V + LMV641 500: VO = 2.50V 24.5 k: 580 k: Figure 47. Thevenin Equivalent Showing Required Gain By choosing input resistor values for R1 and R2 that are four to ten times the bridge element resistance, the bridge is minimally loaded and the offset errors induced by the op amp stages are minimized.
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LMV641 www.ti.com SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 1 § ¨ ¨1 © - 1 2 n+1 § ¨ ¨ © MAX FREQ = 2 - 1 = 0.062 x f-3 dB = 0.062 x 380 kHz = 23.56 kHz (5) which is the highest frequency that can be measured with required accuracy. VOICEBAND FILTER The majority of the energy of recognizable speech is within a band of frequencies between 200 Hz and 4 kHz.
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LMV641 SNOSAW3C – SEPTEMBER 2007 – REVISED FEBRUARY 2013 www.ti.com REVISION HISTORY Changes from Revision B (February 2013) to Revision C • 18 Page Changed layout of National Data Sheet to TI Format ........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (3) 11-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LMV641MAE/NOPB Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV641MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMV641MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV641MAE/NOPB SOIC D LMV641MAX/NOPB SOIC D 8 250 210.0 185.0 35.0 8 2500 367.0 367.0 35.0 LMV641MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV641MFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LMV641MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV641MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.