Datasheet

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LMV712-N

www.ti.com

SNOS534G –MAY 2004–REVISED MARCH 2010

LMV712-N Low Power, Low Noise, High Output, RRIO Dual Operational Amplifier with

Independent Shutdown

Check for Samples: LMV712-N

FEATURES

• (Typical Unless Otherwise Noted)

• 1.5µA Shutdown I

• 5MHz GBP • 2.2µs Turn On

• Slew Rate 5V/µs

APPLICATIONS

• Low Noise 20nV/√Hz

• Power Amplifier Control Loop

• Supply Current 1.22mA/Channel

• Cellular Phones

• V

< 3mV Max

• Portable Equipment

• Guaranteed 2.7V and 5V Specifications

• Wireless LAN

• Rail-to-Rail Inputs and Outputs

• Radio Systems

• Unity Gain Stable

• Cordless Phones

• Small Package: 10-Pin WSON, 10-Pin VSSOP

and 10-Bump DSBGA

DESCRIPTION

The LMV712-N duals are high performance BiCMOS operational amplifiers intended for applications requiring

Rail-to-Rail inputs combined with speed and low noise. They offer a bandwidth of 5MHz and a slew rate of 5

V/µs and can handle capacitive loads of up to 200pF without oscillation.

The LMV712-N is guaranteed to operate from 2.7V to 5.5V and offers two independent shutdown pins. This

feature allows disabling of each device separately and reduces the supply current to less than 1µA typical. The

output voltage rapidly ramps up smoothly with no glitch as the amplifier comes out of the shutdown mode.

The LMV712-N with the shutdown feature is offered in space saving 10-Bump DSBGA and 10-Pin WSON

packages. It is also offered in 10-Pin VSSOP package. These packages are designed to meet the demands of

small size, low power, and low cost required by cellular phones and similar battery operated portable electronics.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 LMV712-N Low Power, Low Noise, High Output, RRIO Dual Operational Amplifier with Independent Shutdown Check for Samples: LMV712-N FEATURES 1 • • • • • • • • • • 2 (Typical Unless Otherwise Noted) 5MHz GBP Slew Rate 5V/µs Low Noise 20nV/√Hz Supply Current 1.22mA/Channel VOS< 3mV Max Guaranteed 2.7V and 5V Specifications Rail-to-Rail Inputs and Outputs Unity Gain Stable Small Package: 10-Pin WSON, 10-Pin VSSOP and 10-Bump DSBGA • • 1.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com Typical Application Circuit Figure 1. P.A. Control Loop These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) (3) Human Body Model 1.5kV Machine Model 150V Differential Input Voltage ±Supply Voltage (V+) +0.4V to (V−) −0.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 Recommended Operating Conditions (1) Supply Voltage 2.7V to 5.5V −40°C ≤ TJ ≤ 85°C Temperature Range Thermal Resistance 10-Pin VSSOP 235°C/W 10-Pin WSON 53.4°C/W 10-Bump DSBGA 196°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com 2.7V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for V+ = 2.7V, V − = 0V, VCM = 1.35V and TA = 25°C and RL > 1MΩ. Boldface limits apply at the temperature extremes. Symbol AVOL Parameter Large Signal Voltage Gain VSD Shutdown Pin Voltage Range GBWP Gain-Bandwidth Product SR Slew Rate φm Phase Margin en Input Referred Voltage Noise Condition Min Typ Sourcing RL = 10kΩ VO = 1.35V to 2.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 5V Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for V+ = 5V, V − = 0V, VCM = 2.5V and TA = 25°C and RL > 1MΩ. Boldface limits apply at the temperature extremes. Symbol Parameter Condition RL = 10kΩ to 2.5V Min Typ 4.92 4.90 4.98 (1) (2) 0.01 VO Output Swing RL = 600Ω to 2.5V VO(SD) 4.82 4.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Supply Current Per Channel vs. Supply Voltage Supply Current vs. Supply Voltage (Shutdown) 1.5 0.6 85°C 1.3 0.5 25°C IS (µA) IS (mA) 1.1 -40°C 0.4 0.9 0.3 0.7 0.5 2.7 3.0 3.5 4.0 4.5 0.2 2.7 3.0 5.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 2. Figure 3. VOS vs. VCM IB vs. VCM Over Temp 5.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Sourcing Current vs. Output Voltage, VS = 2.7V Sourcing Current vs. Output Voltage, VS = 5V 35 30 85°C 85°C 30 25 25 ISOURCE (mA) ISOURCE (mA) 25°C 20 -40°C 15 10 -40°C 25°C 20 15 10 5 5 0 -0.3 0 0.2 0.7 1.2 1.7 2.2 0 2.7 1 + 2 3 4 VOUT FROM V (V) VOUT (V) Figure 8. Figure 9. Sinking Current vs.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. CMRR vs. Frequency CMRR vs. Frequency 100 100 VS = 2.7V 90 90 dVCM = 0.2V TO 1.2V 80 80 70 CMRR (dB) 60 50 40 60 50 40 30 30 20 20 10 10 0 0 10 100 1k 10k dVCM = 2V TO 3V 10 1M 100k VS = 5V 100 1k FREQUENCY (Hz) Open Loop Frequency Response vs. RL Open Loop Frequency Response vs. RL 80 VS = 2.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. Voltage Noise vs. Frequency Voltage Noise vs. Frequency 1000 1000 INPUT VOLTAGE NOISE (nV/ Hz) INPUT VOLTAGE NOISE (nV/ Hz) VS = 2.7V VCM = 1.35V VSD = 2.7V 100 10 VS = 5V VCM = 2.5V VSD = 5V 100 10 1 1 1 10 100 1k FREQUENCY (Hz) 10k 1 100k 10 100 1k FREQUENCY (Hz) 10k 100k Figure 21.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VS = +5V, single supply, TA = 25°C. INPUT Inverting Large Signal Pulse Response, VS = 5V OUTPUT OUTPUT (1V/div) (1V/div) INPUT Inverting Large Signal Pulse Response, VS = 2.7V TIME (500ns/div) Figure 26. Figure 27. Inverting Small Signal Pulse Response, VS = 2.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 APPLICATION INFORMATION THEORY OF OPERATION The LMV712-N dual op amp is derived from the LMV711 single op amp. Figure 32 contains a simplified schematic of one channel of the LMV712-N. V + VBIAS IP MP3 Q2 MP1 IN MP2 Q1 MN2 + IN - CLASS AB CONTROL OUT MN3 MN1 Q3 Q4 Q5 IN V MP4 Q6 MN4 VBIAS - SD BIAS CONTROL Figure 32.
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LMV712-N www.ti.com OUTPUT VOLTAGE (2V/div) SHUTDOWN PULSE SNOS534G – MAY 2004 – REVISED MARCH 2010 TIME (2µs/div) Figure 33. A glitch-free output waveform is highly desirable in many applications, one of which is power amplifier control loops. In this application, the LMV712-N is used to drive the power amplifier's power control. If the LMV712-N did not have a smooth output ramp during turn on, it would directly cause the power amplifier to produce a glitch at its output.
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LMV712-N www.ti.com SNOS534G – MAY 2004 – REVISED MARCH 2010 The circuit in Figure 35 is an improvement to the one in Figure 34 because it provides DC accuracy as well as AC stability. In this circuit, RF provides the DC accuracy by using feed-forward techniques to connect VIN to RL. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop.
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LMV712-N SNOS534G – MAY 2004 – REVISED MARCH 2010 www.ti.com CONNECTION DIAGRAMS *Connect thermal pad to V-or leave floating 10 -IN A 9 2 3 - + OUT A 1 OUT B + + +IN A V V - 4 8 -IN B 2 +IN A 3 7 5 6 SD A - +IN B V SD B SD A - + + 4 5 - + 9 OUT B 8 -IN B 7 +IN B 6 SD B Figure 36. 10-Pin VSSOP (Top View) Figure 37.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LMV712LD/NOPB Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant WSON NGY 10 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LMV712LDX/NOPB WSON NGY 10 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LMV712MM VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV712LD/NOPB WSON NGY 10 1000 213.0 191.0 55.0 LMV712LDX/NOPB WSON NGY 10 4500 367.0 367.0 35.0 LMV712MM VSSOP DGS 10 1000 210.0 185.0 35.0 LMV712MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0 LMV712MMX VSSOP DGS 10 3500 367.0 367.0 35.0 LMV712MMX/NOPB VSSOP DGS 10 3500 367.0 367.0 35.
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MECHANICAL DATA NGY0010A LDA10A (Rev B) www.ti.
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MECHANICAL DATA YPA0010 0.600 ±0.075 D E TLP10XXX (Rev D) D: Max = 2.048 mm, Min =1.987 mm E: Max = 1.565 mm, Min =1.504 mm 4215069/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.
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