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LMZ10503

www.ti.com

SNVS641I –JANUARY 2010–REVISED OCTOBER 2013

LMZ10503 3A SIMPLE SWITCHER® Power Module with 5.5V Maximum Input Voltage

Check for Samples: LMZ10503

FEATURES

PERFORMANCE BENEFITS

• Integrated Shielded Inductor

• Operates at High Ambient Temperatures

• Flexible Startup Sequencing using External

• High Efficiency up to 96% Reduces System

Soft-Start, Tracking, and Precision Enable

Heat Generation

• Protection Against In-Rush Currents and

• Low Radiated Emissions (EMI) Complies with

Faults Such as Input UVLO and Output Short-

EN55022 Class B Standard

(2)

Circuit

• Low Output Voltage Ripple of 10 mV Allows

• -40°C to +125°C Junction Temperature

for Powering Noise-Sensitive Transceiver and

Operating Range

Signaling ICs

• Single Exposed pad and Standard Pinout for

• Fast Transient Response for Powering FPGAs

Easy Mounting and Manufacturing

and ASICs

• Pin-to-Pin Compatible with

– LMZ10504 (4A/20W max)

ELECTRICAL SPECIFICATIONS

– LMZ10505 (5A/25W max)

• 15W Maximum Total Output Power

• Fully Enabled for WEBENCH® and Power

• Up to 3A Output Current

Designer

• Input Voltage Range 2.95V to 5.5V

• Output Voltage Range 0.8V to 5V

APPLICATIONS

• ±1.63% Feedback Voltage Accuracy Over

• Point-of-Load Conversions from 3.3V and 5V

Temperature

Rails

• Efficiency up to 96%

• Space Constrained Applications

• Extreme Temperatures/no Air Flow

DESCRIPTION

Environments

The LMZ10503 SIMPLE SWITCHER® power module

• Noise Sensitive Applications (i.e. Transceiver,

is a complete, easy-to-use DC-DC solution capable of

Medical)

driving up to a 3A load with exceptional power

conversion efficiency, output voltage accuracy, line

and load regulation. The LMZ10503 is available in an

innovative package that enhances thermal

performance and allows for hand or machine

soldering.

Figure 1. Easy to use PFM 7 Pin Package

10.16 x 13.77 x 4.57 mm (0.4 x 0.39 x 0.18 in)

= 20°C/W, θ

= 1.9°C/W

(1)

RoHS Compliant

Peak Reflow Case Temp = 245°C

Power Module SMT Guidelines

(1) θ

measured on a 2.25” x 2.25” (5.8 cm x 5.8 cm) four layer

board, with one ounce copper, thirty six thermal vias, no air

flow, and 1W power dissipation. Refer to PCB Layout

Diagrams or Evaluation Board Application Note: AN-2022 (2) EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007.

(SNVA421). See Table 9 and layout for information on device under test.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

PAGE 1
LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 LMZ10503 3A SIMPLE SWITCHER® Power Module with 5.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com DESCRIPTION (CONTINUED) The LMZ10503 can accept an input voltage rail between 2.95V and 5.5V and deliver an adjustable and highly accurate output voltage as low as 0.8V. One megahertz fixed frequency PWM switching provides a predictable EMI characteristic. Two external compensation components can be adjusted to set the fastest response time, while allowing the option to use ceramic and/or electrolytic output capacitors.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Connection Diagram Exposed Pad Connect to GND 7 VOUT 6 VOUT 5 FB 4 GND 3 SS 2 EN 1 VIN Figure 5. Top View 7-Lead PFM Package Number NDW0007A PIN DESCRIPTIONS Pin Number Name Description 1 VIN Power supply input. A low ESR input capacitance should be located as close as possible to the VIN pin and exposed pad (EP). 2 EN Active high enable input for the device. 3 SS Soft-start control pin.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Electrical Characteristics Specifications with standard typeface are for TJ = 25°C only; limits in bold face type apply over the operating junction temperature range TJ of -40°C to 125°C. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = VEN = 3.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C only; limits in bold face type apply over the operating junction temperature range TJ of -40°C to 125°C. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = VEN = 3.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified, the following conditions apply: VIN = VEN = 5.0V, CIN is 47 µF 10V X5R ceramic capacitor; TAMBIENT = 25°C for efficiency curves and waveforms. 6 Load Transient Response VIN = 3.3V, VOUT = 2.5V, IOUT = 0.3A to 2.7A to 0.3A step 20 MHz Bandwidth Limited Refer to Table 5 for BOM, includes optional components Load Transient Response VIN = 5.0V, VOUT = 2.5V, IOUT = 0.3A to 2.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = VEN = 5.0V, CIN is 47 µF 10V X5R ceramic capacitor; TAMBIENT = 25°C for efficiency curves and waveforms. Efficiency VOUT = 3.3V Efficiency VOUT = 2.5V Figure 10. Figure 11. Efficiency VOUT = 1.8V Efficiency VOUT = 1.5V Figure 12. Figure 13. Efficiency VOUT = 1.2V Efficiency VOUT = 0.8V Figure 14. Figure 15.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = VEN = 5.0V, CIN is 47 µF 10V X5R ceramic capacitor; TAMBIENT = 25°C for efficiency curves and waveforms. Current Derating VIN = 5V, θJA = 20°C / W Current Derating VIN = 3.3V, θJA = 20°C / W Figure 16. Figure 17. Radiated Emissions (EN55022, Class B) VIN = 5V, VOUT = 2.5V, IOUT = 3A Evaluation board Startup VOUT = 2.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Block Diagram VIN 1 1: SS Drivers Voltage Mode Control 3 5 2.2 PF 2.2 PH 6, 7 VOUT N-MOSFET 2 EN P-MOSFET 2.2 PF 4, EP FB GND DESIGN GUIDELINE AND OPERATING DESCRIPTION Design Steps LMZ10503 is fully supported by Webench® and offers the following: component selection, performance, electrical, and thermal simulations as well as the Build-It board, for a reduced design time.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Neglecting capacitor equivalent series resistance (ESR), the resultant input capacitor AC ripple voltage is a triangular waveform. The minimum input capacitance for a given peak-to-peak value (ΔVIN) of VIN is specified as follows: Cin 8 IOUT x D x (1 - D) fSW x 'VIN (1) where the PWM duty cycle, D, is given by: D= VOUT VIN (2) If ΔVIN is 1% of VIN, this equals to 50 mV and fSW = 1 MHz 2.5V ) x (1 - 2.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Istep x VFB x L x VIN CO t 4 x VOUT x (VIN - VOUT) x 'Vo_tran (11) Where Istep is the peak to peak load step (for this example Istep = 10% to 90% of the maximum load), VFB = 0.8V, and ΔVo_tran is the maximum output voltage deviation, which is ±20 mV. Therefore the capacitance requirement for the given design parameters is: Co 8 2.4A x 0.8V x 2.2 µH x 5V 4 x 2.5V x (5V - 2.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com bandwidth and increased phase margin. Higher bandwidth is associated with faster system response to sudden changes such as load transients. Phase margin changes the characteristics of the response. Lower phase margin is associated with underdamped ringing and higher phase margin is associated with overdamped response.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 (18) As a result, approximately 7.2 square cm of 1oz. copper on top and bottom layers is required for the PCB design. The PCB copper heat sink must be connected to the exposed pad (EP). Approximately thirty six,8mil thermal vias spaced 59mils (1.5 mm) apart must connect the top copper to the bottom copper. For an extended discussion and formulations of thermal rules of thumb, refer to AN-2020 (SNVA419).
PAGE 14
LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If the PCB has multiple copper layers, thermal vias can also be employed to make connection to inner layer heatspreading ground planes. For best results use a 6 x 6 via array with minimum via diameter of 8mils thermal vias spaced 59mils (1.5 mm).
PAGE 15
LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Soft-Start Capacitor Determine the soft-start capacitance with the following relationship CSS = tSS x ISS VFB (20) where VFB is the internal reference voltage (nominally 0.8V), ISS is the soft-start charging current (nominally 2 µA) and CSS is the external soft-start capacitance. Thus, the required soft-start capacitor per unit output voltage startup time is given by CSS = 2.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com RATIOMETRIC STARTUP VOUT1 VOLTAGE VOUT2 EN TIME Tracking - Equal Slew Rates Alternatively, the tracking feature can be used to have similar output voltage ramp rates. This is referred to as simultaneous startup. In this case, the tracking resistors can be determined based on the following equation Rtrkb = 0.8V x Rtrkt VOUT2 - 0.8V (23) and to ensure proper overdrive of the SS pin VOUT2 < 0.
PAGE 17
LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Over-Temperature Protection When the LMZ10503 senses a junction temperature greater than 145°C (typ.), both switching MOSFETs are turned off and the part enters a standby state. Upon sensing a junction temperature below 135°C (typ.), the part will re-initiate the soft-start sequence and begin switching once again.
PAGE 18
LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com U1 Optional VIN 1 2 Cin2 + VOUT VIN CO1 LMZ10503 EN Cin1 Ccomp FB CO3 CO2 Rfbt 5 GND 4, EP SS 3 VOUT 6, 7 Rcomp CSS Optional Rfbb Figure 23. Table 5. Bill of Materials, VIN = 3.3V to 5V, VOUT = 2.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Table 7. Bill of Materials for Evaluation Board, VIN = 3.3V to 5V, VOUT = 2.5V, IOUT (MAX) = 3A Designator Description Case Size Manufacturer Manufacturer P/N Quantity U1 SIMPLE SWITCHER® PFM-7 Texas Instruments LMZ10503 1 Cin1 1 µF, X7R, 16V 0805 TDK C2012X7R1C105K 1 Cin2, CO1 4.7 µF, X5R, 6.3V 0805 TDK C2012X5R0J475K 2 Cin3, CO2 22 µF, X5R, 16V 1210 TDK C3225X5R1C226M 2 Cin4 47 µF, X5R, 6.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Table 10. Output Voltage Setting (Rfbt = 75 kΩ) VOUT Rfbb 3.3 V 23.7 kΩ 2.5 V 34.8 kΩ 1.8 V 59 kΩ 1.5 V 84.5 kΩ 1.2 V 150 kΩ 0.9 V 590 kΩ PCB Layout Diagrams The PCB design is available in the LMZ10503 product folder at www.ti.com. Figure 26. Top Copper Figure 27.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 Figure 28. Internal Layer 2 (Ground and Signal Traces) Figure 29.
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LMZ10503 SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Figure 30. Sample Reflow Profile Table 11. 22 Probe Max Temp (°C) Reached Max Temp Time Above 235°C Reached 235°C Time Above 245°C Reached 245°C Time Above 260°C Reached 260°C #1 242.5 6.58 0.49 6.39 0.00 – 0.00 – #2 242.5 7.10 0.55 6.31 0.00 7.10 0.00 – #3 241.0 7.09 0.42 6.44 0.00 – 0.
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LMZ10503 www.ti.com SNVS641I – JANUARY 2010 – REVISED OCTOBER 2013 REVISION HISTORY Changes from Revision H (April 2013) to Revision I Page • Added Peak Reflow Case Temp = 245°C ............................................................................................................................ 1 • Deleted 10mils ......................................................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 13-Sep-2014 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LMZ10503TZ-ADJ/NOPB LMZ10503TZX-ADJ/NOP B Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TOPMOD NDW 7 250 330.0 24.4 10.6 14.22 5.0 16.0 24.0 Q2 TOPMOD NDW 7 500 330.0 24.4 10.6 14.22 5.0 16.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMZ10503TZ-ADJ/NOPB TO-PMOD NDW 7 250 367.0 367.0 45.0 LMZ10503TZX-ADJ/NOPB TO-PMOD NDW 7 500 367.0 367.0 45.
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MECHANICAL DATA NDW0007A BOTTOM SIDE OF PACKAGE TOP SIDE OF PACKAGE TZA07A (Rev D) www.ti.
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