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LMZ12002

www.ti.com

SNVS650G –JANUARY 2010–REVISED OCTOBER 2013

LMZ12002 2A SIMPLE SWITCHER® Power Module with 20V Maximum Input Voltage

Check for Samples: LMZ12002

KEY FEATURES

ELECTRICAL SPECIFICATIONS

• Integrated Shielded Inductor

• 12W Maximum Total Power Output

• Simple PCB Layout

• Up to 2A Output Current

• Flexible Startup Sequencing Using External

• Input Voltage Range 4.5V to 20V

Soft-start Capacitor and Precision Enable

• Output Voltage Range 0.8V to 6V

• Protection Against Inrush Currents and Faults

• Efficiency up to 92%

Such as Input UVLO and Output Short Circuit

• -40°C to 125°C Junction Temperature Range

PERFORMANCE BENEFITS

• Single Exposed Pad and Standard Pinout for

• Operates at High Ambient Temperature with

Easy Mounting and Manufacturing

no Thermal Derating

• Fast Transient Response for FPGAs and

• High Efficiency Reduces System Heat

ASICs

Generation

• Low Output Voltage Ripple

• Low Radiated Emissions (EMI) Complies with

• Pin-to-Pin Compatible Family:

EN55022 Class B Standard

– LMZ14203/2/1 (42V max 3A, 2A, 1A)

• Low External Component Count

– LMZ12003/2/1 (20V max 3A, 2A, 1A)

• Fully Webench® Power Designer Enabled

DESCRIPTION

The LMZ12002 SIMPLE SWITCHER® power module

APPLICATIONS

is an easy-to-use step-down DC-DC solution capable

of driving up to 2A load with exceptional power

• Point of Load Conversions from 5V and 12V

conversion efficiency, line and load regulation, and

Input Rail

output accuracy. The LMZ12002 is available in an

• Time Critical Projects

innovative package that enhances thermal

• Space Constrained High Thermal Requirement

performance and allows for hand or machine

Applications

soldering.

• Negative Output Voltage Applications

The LMZ12002 can accept an input voltage rail

(See AN-2027)

between 4.5V and 20V and deliver an adjustable and

highly accurate output voltage as low as 0.8V. The

LMZ12002 only requires three external resistors and

four external capacitors to complete the power

solution. The LMZ12002 is a reliable and robust

design with the following protection features: thermal

shutdown, input under-voltage lockout, output over-

voltage protection, short-circuit protection, output

current limit, and allows startup into a pre-biased

output. A single resistor adjusts the switching

frequency up to 1 MHz.

Figure 1. Easy To Use PFM 7 Pin Package

10.16 x 13.77 x 4.57 mm (0.4 x 0.542 x 0.18 in)

= 20°C/W, θ

= 1.9°C/W

RoHS Compliant

Peak Reflow Case Temp = 245°C

Power Module SMT Guidelines

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

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LMZ12002 www.ti.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com System Performance Figure 2. Efficiency VIN = 12V VOUT = 5.0V 100 95 EFFICIENCY (%) 90 85 80 75 70 65 60 55 50 25°C 0 1 0.5 2 1.5 OUTPUT CURRENT (A) Figure 3. Thermal Derating Curve VIN = 12V VOUT = 5.0V 2.5 OUTPUT CURRENT (A) 2 1.5 1 0.5 0 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) Figure 4. Radiated Emissions (EN 55022 Class B) from Evaluation Board RADIATED EMISSIONS (dBPV/m) 80.0 70.0 60.0 50.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Simplified Application Schematic VOUT FB SS GND EN VIN VIN RON LMZ12002 VOUT RFBT 5V 3.3V 2.5V 1.8V 1.5V 1.2V 0.8V 5.62k 3.32k 2.26k 1.87k 1.00k 4.22k 0 RFBB 1.07k 1.07k 1.07k 1.50k 1.13k 8.45k 39.2k RON VIN Range 100k 61.9k 47.5k 32.4k 28.0k 22.6k 24.9k 7.5...20V 6.5...20V 5.5...20V 4.5...20V 4.5...20V 4.5...19V 4.5...18V VOUT @ 2A CFF RON 0.022 PF RFBT See Table Enable See Table CIN CSS RFBB 10 PF 0.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Absolute Maximum Ratings www.ti.com (1) (2) VIN, RON to GND -0.3V to 25V EN, FB, SS to GND -0.3V to 7V Junction Temperature 150°C Storage Temperature Range -65°C to 150°C ESD Susceptibility (3) ±2 kV Peak Reflow Case Temperature (30 sec) 245°C For soldering specifications, refer to the following document: www.ti.com/lit/snoa549c (1) (2) (3) Absolute Maximum Ratings are limits beyond which damage to the device may occur.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Efficiency 4.5V Input 25°C Dissipation 4.5V Input @ 25°C 100 1.2 1.8 95 1.0 85 80 DISSIPATION (W) EFFICIENCY (%) 90 1.8 1.5 1.2 75 70 65 60 0.8 0.6 1.2 0.4 0.2 55 50 1.5 25°C 25°C 0 0 0.4 0.8 1.2 1.6 2 0 0.4 0.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Efficiency 8V Input @ 25°C Dissipation 6V Input @ 25°C 100 1.2 95 EFFICIENCY (%) 85 80 75 DISSIPATION (W) 5.0 3.3 2.5 1.8 1.5 1.2 90 70 65 60 0 0.4 0.8 1.2 1.6 2.5 1.8 0.6 1.5 1.2 0.4 25°C 0 2 0 0.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Efficiency 4.5V Input @ 85°C Dissipation 4.5V Input @ 85°C 1.6 100 1.8 1.4 1.2 DISSIPATION (W) EFFICIENCY (%) 90 1.8 80 1.2 70 1.5 1.5 1.0 0.8 1.2 0.6 0.4 60 0.2 85°C 85°C 0.0 50 0 0.4 0.8 1.2 1.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Efficiency 8V Input @ 85°C Dissipation 8V Input @ 85°C 1.6 100 3.3 5.0 1.4 2.5 1.5 1.8 2.5 1.2 DISSIPATION (W) EFFICIENCY (%) 90 80 1.8 70 1.2 1.5 3.3 1.0 0.8 1.2 5.0 0.6 0.4 60 0.2 85°C 85°C 0.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Line and Load Regulation @ 25°C Line and Load Regulation @ 85°C 1.820 1.825 1.820 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.814 6 1.808 8 12 1.802 5 20 1.796 1.815 1.810 8 1.805 6 1.800 1.795 12 4.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Typical Performance Characteristics (continued) Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tambient = 25 C for efficiency curves and waveforms. Current Limit 3.3VOUT @ 85°C 2.5 3.3 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 3.5 SHORT CIRCUIT 3.1 2.9 2 12 VIN 1.5 20 VIN 1 ÆJA = 19.6°C/W VOUT = 1.8V 85°C 2.5 0 4.5 VIN 0.5 ONSET 2.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com APPLICATION BLOCK DIAGRAM Vin VIN 1 Linear reg Cvcc 5 CIN SS Css CBST 3 EN RON 2 VOUT 7 RON Timer CFF 6 10 PH VO Co FB RFBT RFBB 0.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 COT CONTROL CIRCUIT OVERVIEW Constant On Time control is based on a comparator and an on-time one shot, with the output voltage feedback compared with an internal 0.8V reference. If the feedback voltage is below the reference, the main MOSFET is turned on for a fixed on-time determined by a programming resistor RON. RON is connected to VIN such that ontime is reduced with increasing input supply voltage.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com For VO = 0.8V the FB pin can be connected to the output directly so long as an output preload resistor remains that draws more than 20uA. Converter operation requires this minimum load to create a small inductor ripple current and maintain proper regulation when no load is present. A feed-forward capacitor is placed in parallel with RFBT to improve load step transient response.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Recommended minimum input capacitance is 10uF X7R ceramic with a voltage rating at least 25% higher than the maximum applied input voltage for the application. It is also recommended that attention be paid to the voltage and temperature deratings of the capacitor selected.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Following is a comparison pair of waveforms of the showing both CCM (upper) and DCM operating modes. Figure 38. CCM and DCM Operating Modes VIN = 12V, VO = 3.3V, IO = 2A/0.26A 2 μsec/div 500 mA/Div 2.00 Ps/Div The approximate formula for determining the DCM/CCM boundary is as follows: IDCB≊VO*(VIN–VO)/(2*10 μH*fSW(CCM)*VIN) (16) Following is a typical waveform showing the boundary condition. Figure 39.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 As a result, approximately 15.9 square cm of 1 oz copper on top and bottom layers is required for the PCB design. The PCB copper heat sink must be connected to the exposed pad. Approximately thirty six, 8 mils thermal vias spaced 59 mils (1.5 mm) apart must connect the top copper to the bottom copper. For an example of a high thermal performance PCB layout, refer to the demo board application note AN-2024.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Additional Features OUTPUT OVER-VOLTAGE COMPARATOR The voltage at FB is compared to a 0.92V internal reference. If FB rises above 0.92V the on-time is immediately terminated. This condition is known as over-voltage protection (OVP). It can occur if the input voltage is increased very suddenly or if the output load is decreased very suddenly. Once OVP is activated, the top MOSFET on-times will be inhibited until the condition clears.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Evaluation Board Schematic Diagram U1 EP VIN Enable VOUT 1.8VO @ 2A 7 FB SS 6 GND 5 VIN EN 4 3 2 1 RON LMZ12002TZ-ADJ 4.5V to 20V RENT CFF 32.4k 0.022 PF RON RFBT 32.4k RENB 11.8k 1.37k CIN2 CIN1 CSS RFBB 10 PF 1 PF 0.022 PF 1.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com Figure 41.
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LMZ12002 www.ti.com SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 Figure 42. Sample Reflow Profile Table 1. Probe Max Temp (°C) Reached Max Temp Time Above 235°C Reached 235°C Time Above 245°C Reached 245°C Time Above 260°C Reached 260°C #1 242.5 6.58 0.49 6.39 0.00 – 0.00 – #2 242.5 7.10 0.55 6.31 0.00 7.10 0.00 – #3 241.0 7.09 0.42 6.44 0.00 – 0.
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LMZ12002 SNVS650G – JANUARY 2010 – REVISED OCTOBER 2013 www.ti.com REVISION HISTORY Changes from Revision F (March 2013) to Revision G Page • Added Peak Reflow Case Temp = 245°C ............................................................................................................................ 1 • Deleted 12mils ......................................................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 13-Sep-2014 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LMZ12002TZ-ADJ/NOPB LMZ12002TZX-ADJ/NOP B Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TOPMOD NDW 7 250 330.0 24.4 10.6 14.22 5.0 16.0 24.0 Q2 TOPMOD NDW 7 500 330.0 24.4 10.6 14.22 5.0 16.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMZ12002TZ-ADJ/NOPB TO-PMOD NDW 7 250 367.0 367.0 45.0 LMZ12002TZX-ADJ/NOPB TO-PMOD NDW 7 500 367.0 367.0 45.
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MECHANICAL DATA NDW0007A BOTTOM SIDE OF PACKAGE TOP SIDE OF PACKAGE TZA07A (Rev D) www.ti.
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