Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsLMZ31710RVQT

100

0 1 2 3 4 5 6 7 8 9 10

Efficiency (%)

Output Current (A)

PVIN = 3.3 V, VIN = 5 V

PVIN = VIN = 5 V

PVIN = VIN = 12 V

C001

Vout = 2.5 V

Fsw = 750 kHz

LMZ31710

PWRGD

SENSE+

VOUT

PVIN

VIN

INH/UVLO

RT/CLK

VADJ

SS/TR

STSEL

AGND PGND

SET

OUT

SYNC_OUT

ISHARE

LMZ31710

www.ti.com

SNVS987A –JULY 2013–REVISED JULY 2013

10A SIMPLE SWITCHER® Power Module with 2.95V-17V Input and Current Sharing

in QFN Package

Check for Samples: LMZ31710

FEATURES

DESCRIPTION

The LMZ31710 SIMPLE SWITCHER power module

• Complete Integrated Power Solution Allows

is an easy-to-use integrated power solution that

Small Footprint, Low-Profile Design

combines a 10-A DC/DC converter with power

• 10mm x 10mm x 4.3mm Package

MOSFETs, a shielded inductor, and passives into a

- Pin Compatible with LMZ31707 & LMZ31704

low profile, QFN package. This total power solution

allows as few as three external components and

• Efficiencies Up to 95%

eliminates the loop compensation and magnetics part

• Eco-Mode / Light Load Efficiency (LLE)

selection process.

• Wide-Output Voltage Adjust

The 10x10x4.3 mm QFN package is easy to solder

0.6 V to 5.5 V, with 1% Reference Accuracy

onto a printed circuit board and allows a compact

• Supports Parallel Operation for Higher Current

point-of-load design. Achieves greater than 95%

• Optional Split Power Rail allows

efficiency and excellent power dissipation capability

Input Voltage Down to 2.95 V

with a thermal impedance of 13.3°C/W. The

LMZ31710 offers the flexibility and the feature-set of

• Adjustable Switching Frequency

a discrete point-of-load design and is ideal for

(200 kHz to 1.2 MHz)

powering a wide range of ICs and systems.

• Synchronizes to an External Clock

Advanced packaging technology affords a robust and

• Provides 180° Out-of-Phase Clock Signal

reliable power solution compatible with standard QFN

mounting and testing techniques.

• Adjustable Slow-Start

• Output Voltage Sequencing / Tracking

Figure 1. SIMPLIFIED APPLICATION

• Power Good Output

• Programmable Undervoltage Lockout (UVLO)

• Over-Current & Over-Temperature Protection

• Pre-bias Output Start-up

• Operating Temperature Range: –40°C to 85°C

• Enhanced Thermal Performance: 13.3°C/W

• Meets EN55022 Class B Emissions

- Integrated Shielded Inductor

APPLICATIONS

• Broadband & Communications Infrastructure

• Automated Test and Medical Equipment

• Compact PCI / PCI Express / PXI Express

• DSP and FPGA Point-of-Load Applications

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (34 pages)

PAGE 1
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 10A SIMPLE SWITCHER® Power Module with 2.95V-17V Input and Current Sharing in QFN Package Check for Samples: LMZ31710 FEATURES DESCRIPTION • The LMZ31710 SIMPLE SWITCHER power module is an easy-to-use integrated power solution that combines a 10-A DC/DC converter with power MOSFETs, a shielded inductor, and passives into a low profile, QFN package.
PAGE 2
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 ELECTRICAL CHARACTERISTICS Over –40°C to 85°C free-air temperature, PVIN = VIN = 12 V, VOUT = 1.8 V, IOUT = 10 A, CIN = 0.1 µF + 2 x 22 µF ceramic + 100 µF bulk, COUT = 4 x 47 µF ceramic (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IOUT Output current TA = 85°C, natural convection 0 (1) 10 A VIN Input bias voltage range Over output current range 4.
PAGE 4
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over –40°C to 85°C free-air temperature, PVIN = VIN = 12 V, VOUT = 1.8 V, IOUT = 10 A, CIN = 0.
PAGE 5
LMZ31710 www.ti.
PAGE 6
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Table 2. PIN DESCRIPTIONS TERMINAL NAME DESCRIPTION NO. 2 AGND 23 Zero volt reference for the analog control circuit. These pins are not connected together internal to the device and must be connected to one another using an AGND plane of the PCB. These pins are associated with the internal analog ground (AGND) of the device. See Layout Recommendations. 20 21 PGND 31 This is the return current path for the power stage of the device.
PAGE 7
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Table 2. PIN DESCRIPTIONS (continued) TERMINAL DESCRIPTION NAME NO. SS/TR 28 Slow-start and tracking pin. Connecting an external capacitor to this pin adjusts the output voltage rise time. A voltage applied to this pin allows for tracking and sequencing control. STSEL 29 Slow-start or track feature select. Connect this pin to AGND to enable the internal SS capacitor. Leave this pin open to enable the TR feature.
PAGE 8
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com TYPICAL CHARACTERISTICS (PVIN = VIN = 12 V) 100 30 Output Ripple Voltage (mV) 90 70 Vo = 5.0V, fsw = 1MHz Vo = 3.3V, fsw = 750kHz Vo = 2.5V, fsw = 750kHz Vo = 1.8V, fsw = 500kHz Vo = 1.2V, fsw = 300kHz Vo = 0.9V, fsw = 250kHz 60 50 40 0 1 2 3 4 5 6 7 8 9 Output Current (A) Vo = 5.0V, fsw = 1MHz Vo = 3.3V, fsw = 750kHz Vo = 2.5V, fsw = 750kHz Vo = 1.8V, fsw = 500kHz Vo = 1.2V, fsw = 300kHz Vo = 0.
PAGE 9
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 TYPICAL CHARACTERISTICS (PVIN = VIN = 5 V) 100 30 Output Voltage Ripple (mV) 80 70 Vo = 3.3V, fsw = 750kHz Vo = 2.5V, fsw = 750kHz Vo = 1.8V, fsw = 500kHz Vo = 1.2V, fsw = 300kHz Vo = 0.9V, fsw = 250kHz Vo = 0.6V, fsw = 200kHz 60 50 40 0 1 2 3 4 5 6 7 8 9 Output Current (A) 25 20 15 10 5 10 0 3.5 3.0 6 8 10 C004 Figure 9. Voltage Ripple vs. Output Current Gain (dB) Power Dissipation (W) 4.
PAGE 10
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com TYPICAL CHARACTERISTICS (PVIN = 3.3 V, VIN = 5 V) 100 30 Output Ripple Voltage (mV) 80 70 Vo = 2.5V, fsw = 750kHz Vo = 1.8V, fsw = 500kHz 60 Vo = 1.2V, fsw = 300kHz 50 Vo = 0.9V, fsw = 250kHz 25 20 15 10 Vo = 0.6V, fsw = 200kHz 40 0 1 2 3 4 5 6 7 8 9 Output Current (A) 5 10 0 3.5 3.0 6 8 10 C004 Figure 14. Voltage Ripple vs. Output Current Gain (dB) Power Dissipation (W) 4.0 4 Output Current (A) Vo = 2.
PAGE 11
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 APPLICATION INFORMATION Adjusting the Output Voltage The VADJ control sets the output voltage of the LMZ31710. The output voltage adjustment range is from 0.6V to 5.5V. The adjustment method requires the addition of RSET, which sets the output voltage, the connection of SENSE+ to VOUT, and in some cases RRT which sets the switching frequency. The RSET resistor must be connected directly between the VADJ (pin 26) and AGND (pin 23).
PAGE 12
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Capacitor Recommendations for the LMZ31710 Power Supply Capacitor Technologies Electrolytic, Polymer-Electrolytic Capacitors When using electrolytic capacitors, high-quality, computer-grade electrolytic capacitors are recommended. Polymer-electrolytic type capacitors are recommended for applications where the ambient operating temperature is less than 0°C.
PAGE 13
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Table 6. Recommended Input/Output Capacitors (1) CAPACITOR CHARACTERISTICS VENDOR SERIES PART NUMBER WORKING VOLTAGE (V) CAPACITANCE (µF) ESR (2) (mΩ) Murata X5R GRM32ER61E226K 25 22 2 TDK X5R C3225X5R0J107M 6.3 100 2 TDK X5R C3225X5R0J476K 6.3 47 2 Murata X5R GRM32ER60J107M 6.3 100 2 Murata X5R GRM32ER60J476M 6.
PAGE 14
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Transient Waveforms 14 Figure 18. PVIN = 12V, VOUT = 0.9V, 2.5A Load Step Figure 19. PVIN = 5V, VOUT = 0.9V, 2.5A Load Step Figure 20. PVIN = 12V, VOUT = 1.2V, 2.5A Load Step Figure 21. PVIN = 5V, VOUT = 1.2V, 2.
PAGE 15
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Figure 22. PVIN = 12V, VOUT = 1.8V, 2.5A Load Step Figure 23. PVIN = 5V, VOUT = 1.8V, 2.5A Load Step Application Schematics LMZ31710 VIN VIN / PVIN 4.5 V to 17 V PVIN VOUT 1.2 V SENSE+ VOUT + + CIN1 CIN2 100 µF 47 µF CIN3 0.1 µF ISHARE SYNC_OUT COUT1 2x 100 µF COUT2 220 µF PWRGD INH/UVLO RT/CLK SS/TR VADJ STSEL AGND PGND RSET 1.43 k RRT 487 k Figure 24. Typical Schematic PVIN = VIN = 4.5 V to 17 V, VOUT = 1.
PAGE 16
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com LMZ31710 VIN VIN / PVIN 4.5 V to 17 V PVIN VOUT 3.3 V SENSE+ VOUT + + CIN1 CIN2 100 µF 47 µF CIN3 0.1 µF COUT1 100 µF ISHARE SYNC_OUT COUT2 220 µF PWRGD INH/UVLO RT/CLK SS/TR RRT 90.9 k VADJ STSEL AGND PGND RSET 316 Figure 25. Typical Schematic PVIN = VIN = 4.5 V to 17 V, VOUT = 3.3 V VIN 4.5 V to 17 V CIN3 4.7 µF VIN LMZ31710 VOUT 1.0 V SENSE+ PVIN 3.3 V PVIN VOUT + + CIN1 CIN2 100 µF 47 µF CIN3 0.
PAGE 17
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 VIN and PVIN Input Voltage The LMZ31710 allows for a variety of applications by using the VIN and PVIN pins together or separately. The VIN voltage supplies the internal control circuits of the device. The PVIN voltage provides the input voltage to the power converter system. If tied together, the input voltage for the VIN pin and the PVIN pin can range from 4.5 V to 17 V.
PAGE 18
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Parallel Operation Up to six LMZ31710 devices can be paralleled for increased output current. Multiple connections must be made between the paralleled devices and the component selection is slightly different than for a stand-alone LMZ31710 device. A typical LMZ31710 parallel schematic is shown in Figure 27. Refer to application note, SNVA695 for information and design help when paralleling multiple LMZ31710 devices.
PAGE 19
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Power-Up Characteristics When configured as shown in the front page schematic, the LMZ31710 produces a regulated output voltage following the application of a valid input voltage. During the power-up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source.
PAGE 20
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Output On/Off Inhibit (INH) The INH pin provides electrical on/off control of the device. Once the INH pin voltage exceeds the threshold voltage, the device starts operation. If the INH pin voltage is pulled below the threshold voltage, the regulator stops switching and enters low quiescent current state. The INH pin has an internal pull-up current source, allowing the user to float the INH pin for enabling the device.
PAGE 21
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Slow Start (SS/TR) Connecting the STSEL pin to AGND and leaving SS/TR pin open enables the internal SS capacitor with a slow start interval of approximately 1.2 ms. Adding additional capacitance between the SS pin and AGND increases the slow start time. Increasing the slow start time will reduce inrush current seen by the input source and reduce the current seen by the device when charging the output capacitors.
PAGE 22
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Overcurrent Protection For protection against load faults, the LMZ31710 incorporates output overcurrent protection. The overcurrent protection mode can be selected using the OCP_SEL pin. Leaving the OCP_SEL pin open selects hiccup mode and connecting it to AGND selects cycle-by-cycle mode. In hiccup mode, applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down.
PAGE 23
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Synchronization (CLK) An internal phase locked loop (PLL) has been implemented to allow synchronization between 200 kHz and 1200 kHz, and to easily switch from RT mode to CLK mode. To implement the synchronization feature, connect a square wave clock signal to the RT/CLK pin with a duty cycle between 20% to 80%. The clock signal amplitude must transition lower than 0.5 V and higher than 2.0 V.
PAGE 24
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Sequencing (SS/TR) Many of the common power supply sequencing methods can be implemented using the SS/TR, INH and PWRGD pins. The sequential method is illustrated in Figure 39 using two LMZ31710 devices. The PWRGD pin of the first device is coupled to the INH pin of the second device which enables the second power supply once the primary supply reaches regulation. Figure 40 shows sequential turn-on waveforms of two LMZ31710 devices.
PAGE 25
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 Programmable Undervoltage Lockout (UVLO) The LMZ31710 implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO rising threshold is 4.5 V(max) with a typical hysteresis of 150 mV.
PAGE 26
LMZ31710 SNVS987A – JULY 2013 – REVISED JULY 2013 www.ti.com Layout Considerations To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 46 thru Figure 49, shows a typical PCB layout. Some considerations for an optimized layout are: • Use large copper areas for power planes (PVIN, VOUT, and PGND) to minimize conduction loss and thermal stress. • Place ceramic input and output capacitors close to the device pins to minimize high frequency noise.
PAGE 27
LMZ31710 www.ti.com SNVS987A – JULY 2013 – REVISED JULY 2013 EMI The LMZ31710 is compliant with EN55022 Class B radiated emissions. Figure 50 and Figure 51 show typical examples of radiated emissions plots for the LMZ31710 operating from 5V and 12V respectively. Both graphs include the plots of the antenna in the horizontal and vertical positions. Figure 50. Radiated Emissions 5-V Input, 1.8-V Output, 10-A Load (EN55022 Class B) Figure 51. Radiated Emissions 12-V Input, 1.
PAGE 28
PAGE 29
PAGE 30
PAGE 31
PAGE 32
PACKAGE OPTION ADDENDUM www.ti.
PAGE 33
PACKAGE OPTION ADDENDUM www.ti.com 20-Feb-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 34
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.