Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed SOT 223 5

OUT

GND

LP3852-2.5

OUT

10 PF

INPUT

OUT

10 PF

ERROR**

SD**

ERROR

2.5V, 1.5A

3.3V ± 10%

* TANTALUM OR

CERAMIC

LP3852, LP3855

www.ti.com

SNVS174G –FEBRUARY 2003–REVISED APRIL 2013

LP3852/LP3855 1.5A Fast Response Ultra Low Dropout Linear Regulators

Check for Samples: LP3852, LP3855

FEATURES

DESCRIPTION

The LP3852/LP3855 series of fast ultra low-dropout

• Ultra Low Dropout Voltage

linear regulators operate from a +2.5V to +7.0V input

• Stable with Selected Ceramic Capacitors

supply. Wide range of preset output voltage options

• Low Ground Pin Current

are available. These ultra low dropout linear

regulators respond very quickly to step changes in

• Load Regulation of 0.06%

load, which makes them suitable for low voltage

• 10nA Quiescent Current in Shutdown Mode

microprocessor applications. The LP3852/LP3855 are

• Specified Output Current of 1.5A DC

developed on a CMOS process which allows low

quiescent current operation independent of output

• Available in TO-263, TO-220 and SOT-223

load current. This CMOS process also allows the

Packages

LP3852/LP3855 to operate under extremely low

• Output Voltage Accuracy ± 1.5%

dropout conditions.

• Error Flag Indicates Output Status

Dropout Voltage: Ultra low dropout voltage; typically

• Sense Option Improves Load Regulation

24mV at 150mA load current and 240mV at 1.5A load

• Overtemperature/Overcurrent Protection

current.

• −40°C to +125°C Junction Temperature Range

Ground Pin Current: Typically 4mA at 1.5A load

current.

APPLICATIONS

Shutdown Mode: Typically 10nA quiescent current

• Microprocessor Power Supplies

when the shutdown pin is pulled low.

• GTL, GTL+, BTL, and SSTL Bus Terminators

Error Flag:Error flag goes low when the output

• Power Supplies for DSPs

voltage drops 10% below nominal value.

• SCSI Terminator

SENSE: Sense pin improves regulation at remote

• Post Regulators

loads.

• High Efficiency Linear Regulators

Precision Output Voltage: Multiple output voltage

• Battery Chargers

options are available ranging from 1.8V to 5.0V with a

specified accuracy of ±1.5% at room temperature,

• Other Battery Powered Applications

and ±3.0% over all conditions (varying line, load, and

temperature).

Typical Application Circuits

**SD and ERROR pins must be pulled high through a 10kΩ pull-up resistor. Connect the ERROR pin to ground if this

function is not used. See Application Hints for more information.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 LP3852/LP3855 1.5A Fast Response Ultra Low Dropout Linear Regulators Check for Samples: LP3852, LP3855 FEATURES DESCRIPTION • • • • • • • The LP3852/LP3855 series of fast ultra low-dropout linear regulators operate from a +2.5V to +7.0V input supply. Wide range of preset output voltage options are available.
PAGE 2
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com INPUT 3.3V ± 10% VIN CIN* 10 PF VOUT COUT* LP3855-2.5 SD** SENSE GND SD VOUT 2.5V, 1.5A 10 PF * TANTALUM OR CERAMIC **SD must be pulled high through a 10kΩ pull-up resistor. See Application Hints for more information. Connection Diagram Figure 1. Top View TO220-5 Package Bent, Staggered Leads Figure 2. Top View TO263-5 Package GND 5 1 2 3 SD VIN VOUT 4 ERROR /SENSE Figure 3. Top View SOT223-5 Package Table 1.
PAGE 3
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Table 2. Pin Descriptions for SOT223-5 Package Pin # LP3852 Name LP3855 Function Name Function 1 SD Shutdown SD Shutdown 2 VIN Input Supply VIN Input Supply 3 VOUT Output Voltage VOUT Output Voltage 4 ERROR ERROR Flag SENSE Remote Sense Pin 5 GND Ground GND Ground Block Diagram LP3852 Figure 4. LP3855 Figure 5. These devices have limited built-in ESD protection.
PAGE 4
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Absolute Maximum Ratings www.ti.com (1) −65°C to +150°C Storage Temperature Range Lead Temperature (Soldering, 5 sec.) ESD Rating 260°C (2) Power Dissipation 2 kV (3) Internally Limited −0.3V to +7.5V Input Supply Voltage (Survival) −0.3V to 7.5V Shutdown Input Voltage (Survival) Output Voltage (Survival), (4) (5) −0.3V to +6.
PAGE 5
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Electrical Characteristics LP3852/LP3855 Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 10µF, VSD = 2V. Symbol VO ΔV OL ΔVO/ ΔIOUT LP3852/5 Output Voltage Tolerance VOUT +1V ≤ VIN ≤ 7.0V 10 mA ≤ IL ≤ 1.5A 0 VOUT +1V ≤ VIN ≤ 7.0V 0.02 0.06 % (3) 10 mA ≤ IL ≤ 1.5A 0.06 0.
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LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com Electrical Characteristics LP3852/LP3855 (continued) Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 10µF, VSD = 2V. Symbol PSRR ρn(l/f) en 6 Parameter Ripple Rejection Output Noise Density Output Noise Voltage Conditions Typ (1) VIN = VOUT + 1V COUT = 10uF VOUT = 3.
PAGE 7
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. Ground Current vs Output Voltage IL = 1.5A 600 6 500 5 400 5C o 12 300 oC 25 200 oC - 40 100 GROUND PIN CURRENT (mA)_ DROPOUT VOLTAGE (mV) Dropout Voltage vs Output Load Current 4 3 2 1 0 0 0.5 0 1.8 1.5 1 2.3 2.8 3.3 3.8 4.3 5.
PAGE 8
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. VIN vs VOUT Over Temperature Noise vs Frequency 3.0 3.000 2.5 2.500 ( NOISE (PV/ Hz VOUT (V) 2.0 1.5 -40oC 1.0 0.5 25oC IL = 100mA CIN = COUT = 10PF 2.000 1.500 1.000 0.500 125oC 0.0 0.000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.
PAGE 9
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, COUT = 10µF, CIN = 10µF, S/D pin is tied to VIN, VOUT = 2.5V, VIN = VO(NOM) + 1V, IL = 10 mA. Load Transient Response CIN = 2 x 10µF CERAMIC COUT = 2 x 10µF CERAMIC Load Transient Response CIN = COUT = 100µF, TANTALUM VOUT 100 mV/DIV VOUT 100mV/DIV VOUT = 2.
PAGE 10
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com 10 COUT > 10 PF STABLE REGION COUT ESR (:) 1.0 0.1 .01 .001 0 1 LOAD CURRENT (A) 2 Figure 21. ESR Curve for COUT (with 10µF Tantalum Input Capacitor) It should be noted that it is possible to operate the part with an output capacitor whose ESR is below these limits, assuming that sufficient ceramic input capacitance is provided. This will allow stable operation using ceramic output capacitors (see next section).
PAGE 11
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severe they may not be feasible for some applications (see Capacitor Characteristics Section).
PAGE 12
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground technique for the regulator and it's capacitors fixed the problem.
PAGE 13
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 SHORT-CIRCUIT PROTECTION The LP3852 and LP3855 are short circuit protected and in the event of a peak over-current condition, the shortcircuit control loop will rapidly drive the output PMOS pass element off.
PAGE 14
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com Figure 24. Improving remote load regulation using LP3855 SHUTDOWN OPERATION A CMOS Logic low level signal at the shutdown ( SD) pin will turn-off the regulator. Pin SD must be actively terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required.
PAGE 15
LP3852, LP3855 www.ti.com SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 LP3852 and LP3855 are available in TO-220 and TO-263 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow. If the maximum allowable value of θJA calculated above is ≥ 60 °C/W for TO-220 package and ≥ 60 °C/W for TO-263 package no heatsink is needed since the package can dissipate enough heat to satisfy these requirements.
PAGE 16
LP3852, LP3855 SNVS174G – FEBRUARY 2003 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision F (April 2013) to Revision G • 16 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3852EMP-1.8 NRND SOT-223 NDC 5 1000 TBD Call TI Call TI -40 to 125 LHTB LP3852EMP-1.8/NOPB ACTIVE SOT-223 NDC 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LHTB LP3852EMP-2.
PAGE 18
PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3852ESX-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 5 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3852ES -2.5 LP3852ESX-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 5 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3852ES -3.3 LP3852ESX-5.
PAGE 19
PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3855ES-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 5 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3855ES -2.5 LP3855ES-3.3/NOPB ACTIVE DDPAK/ TO-263 KTT 5 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3855ES -3.3 LP3855ES-5.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3852EMP-1.8 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3852EMP-1.8/NOPB SOT-223 NDC 5 1000 330.0 LP3852EMP-2.5 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 16.4 7.0 7.5 2.2 12.0 16.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TO-263 LP3852ESX-5.0/NOPB DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP3855EMP-1.8 SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3855EMP-1.8/NOPB SOT-223 NDC 5 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3 LP3855EMP-2.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3852EMP-1.8 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3852EMP-1.8/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3852EMP-2.5 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3852EMP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3852EMP-3.3 SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3852EMP-3.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3855EMP-2.5/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3855EMP-3.3/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3855EMP-5.0/NOPB SOT-223 NDC 5 1000 367.0 367.0 35.0 LP3855EMPX-1.8/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP3855EMPX-2.5/NOPB SOT-223 NDC 5 2000 367.0 367.0 35.0 LP3855EMPX-3.3/NOPB SOT-223 NDC 5 2000 367.
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MECHANICAL DATA NDH0005D www.ti.
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MECHANICAL DATA NDC0005A www.ti.
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MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.