Datasheet

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LP38693

-ADJ

OUT

GND

1 PF *

OUT

ADJ

LP38691

-ADJ

OUT

GND

1 PF *

OUT

ADJ

LP38691-ADJ, LP38693-ADJ

www.ti.com

SNVS324I –JANUARY 2005–REVISED APRIL 2013

LP38691-ADJ

LP38693-ADJ 500mA Low Dropout CMOS Linear Regulators with Adjustable Output

Stable with Ceramic Output Capacitors

Check for Samples: LP38691-ADJ, LP38693-ADJ

FEATURES

DESCRIPTION

The LP38691/3-ADJ low dropout CMOS linear

• All WSON Options are Available as AEC-Q100

regulators provide 2.0% precision reference voltage,

Grade 1

extremely low dropout voltage (250mV @ 500mA

• Output Voltage Range of 1.25V - 9V

load current, V

OUT

= 5V) and excellent AC

• 2.0% Adjust Pin Voltage Accuracy (25°C)

performance utilizing ultra low ESR ceramic output

capacitors.

• Low Dropout Voltage: 250mV @ 500mA (typ,

5V out)

The low thermal resistance of the WSON and SOT-

223 packages allow the full operating current to be

• Wide Input Voltage Range (2.7V to 10V)

used even in high ambient temperature

• Precision (Trimmed) Bandgap Reference

environments.

• Ensured Specs for -40°C to +125°C

The use of a PMOS power transistor means that no

• 1µA Off-State Quiescent Current

DC base drive current is required to bias it allowing

• Thermal Overload Protection

ground pin current to remain below 100 µA

regardless of load current, input voltage, or operating

• Foldback Current Limiting

temperature.

• SOT-223 and 6-Lead WSON Packages

Dropout Voltage: 250 mV (typ) @ 500mA (typ. 5V

• Enable Pin (LP38693-ADJ)

out).

APPLICATIONS

Ground Pin Current: 55 µA (typ) at full load.

• Hard Disk Drives

Adjust Pin Voltage: 2.0% (25°C) accuracy.

• Notebook Computers

• Battery Powered Devices

• Portable Instrumentation

Typical Application Circuits

OUT

= V

ADJ

x (1 + R1/R2)

*Minimum value required for stability.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 LP38691-ADJ LP38693-ADJ 500mA Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors Check for Samples: LP38691-ADJ, LP38693-ADJ FEATURES DESCRIPTION • The LP38691/3-ADJ low dropout CMOS linear regulators provide 2.
PAGE 2
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Connection Diagrams VEN 1 ADJ 2 5 GND VOUT 3 VIN 4 Figure 1. SOT-223 (LP38693MP-ADJ) – Top View See Package Number NDC0005A VIN 1 GND 2 N/C 3 Exposed Pad on Bottom (DAP) 6 VIN 5 VOUT 4 ADJ Figure 2. 6-Lead WSON (LP38691SD-ADJ) – Top View See Package Number NGG0006A VIN 1 GND 2 VEN 3 Exposed Pad on Bottom (DAP) 6 VIN 5 VOUT 4 ADJ Figure 3.
PAGE 3
LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) −65°C to +150°C Storage Temperature Range Lead Temp. (Soldering, 5 seconds) 260°C ESD Rating (3) 2 kV Power Dissipation (4) Internally Limited V(max) All pins (with respect to GND) -0.3V to 12V IOUT (5) Internally Limited Junction Temperature −40°C to +150°C (1) (2) (3) (4) (5) Absolute maximum ratings indicate limits beyond which damage to the component may occur.
PAGE 4
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 µF, ILOAD = 10mA. Min/Max limits are specified through testing, statistical correlation, or design.
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LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 VIN P-FET VEN + ENABLE LOGIC MOSFET DRIVER P-FET FOLDBACK CURRENT LIMITING THERMAL SHUTDOWN VOUT 1.25V REFERENCE ADJ GND Figure 5.
PAGE 6
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, enable pin is tied to VIN (LP38693-ADJ only), VO = 1.25V, VIN = 2.7V, IL = 10mA. Noise vs Frequency Noise vs Frequency 1.0 1.2 COUT = 10 PF COUT = 1 PF 0.8 Hz) Hz) 1.0 0.6 NOISE (PV/ NOISE/ (PV 0.8 0.6 0.4 0.4 0.2 0.2 0.0 0.0 10 100 1k 10k 100k 10 100 FREQUENCY (Hz) Figure 6.
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LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, enable pin is tied to VIN (LP38693-ADJ only), VO = 1.25V, VIN = 2.7V, IL = 10mA. VREF vs Temperature Line Transient Response 0.4 VOUT = 1.25V COUT = 100 PF 20 'VOUT (mV) 0.2 % DEVIATION 0 -0.2 10 VOUT 0 -10 -0.4 -20 VIN 3 -0.8 -1 -50 2 VIN (V) 4 -0.
PAGE 8
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, enable pin is tied to VIN (LP38693-ADJ only), VO = 1.25V, VIN = 2.7V, IL = 10mA. Line Transient Response Load Transient Response VOUT = 3.3V 200 COUT = 1 PF 100 COUT = 10 PF 'VOUT (mV) 100 'VOUT (mV) 50 VOUT 0 -50 0 VOUT -100 -200 0.5 ILOAD (A) -100 ILOAD VIN 4 VIN (V) 5 0.
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LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, enable pin is tied to VIN (LP38693-ADJ only), VO = 1.25V, VIN = 2.7V, IL = 10mA. VOUT vs VIN , VOUT = 1.25V VOUT vs VIN , VOUT = 1.80V Figure 24. Figure 25. VOUT vs VIN, Power-Up VOUT vs VEN, ON (LP38693 Only) Figure 26. Figure 27. VOUT vs VEN, OFF (LP38693 Only) MIN VIN vs IOUT 2.6 2.5 MIN VIN (V) 2.
PAGE 10
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, enable pin is tied to VIN (LP38693-ADJ only), VO = 1.25V, VIN = 2.7V, IL = 10mA. Dropout Voltage vs IOUT (VOUT = 1.8V) 900 800 VDROPOUT (mV) 700 -40°C 600 500 400 125°C 300 25°C 200 100 0 0 100 200 300 400 500 IOUT (mA) Figure 30.
PAGE 11
LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 APPLICATION HINTS EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. These capacitors must be correctly selected for proper performance. INPUT CAPACITOR: An input capacitor of at least 1µF is required (ceramic recommended). The capacitor must be located not more than one centimeter from the input pin and returned to a clean analog ground.
PAGE 12
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5V capacitor can lose 60% of its rated capacitance with half of the rated voltage applied to it. The Z5U and Y5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of the temperature range.
PAGE 13
LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 WSON MOUNTING The NGG0006A (No Pullback) 6-Lead WSON package requires specific mounting techniques which are detailed in the TI AN-1187 Application Report. Referring to the section PCB Design Recommendations (Page 6), it should be noted that the pad style which should be used with the WSON package is the NSMD (non-solder mask defined) type. Additionally, it is recommended the PCB terminal pads to be 0.
PAGE 14
LP38691-ADJ, LP38693-ADJ SNVS324I – JANUARY 2005 – REVISED APRIL 2013 www.ti.com OUTPUT NOISE Noise is specified in two ways- Spot Noise or Output Noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a function of frequency. Total Output Noise or Broad-Band Noise is the RMS sum of spot noise over a specified bandwidth, usually several decades of frequencies.
PAGE 15
LP38691-ADJ, LP38693-ADJ www.ti.com SNVS324I – JANUARY 2005 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision H (April 2013) to Revision I • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 5-Apr-2014 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 15-Apr-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device LP38691QSD-ADJ/NOPB LP38691QSDX-ADJ/NOP B Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LP38691SD-ADJ WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 15-Apr-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP38691QSD-ADJ/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LP38691QSDX-ADJ/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LP38691SD-ADJ WSON NGG 6 1000 210.0 185.0 35.0 LP38691SD-ADJ/NOPB WSON NGG 6 1000 203.0 203.0 35.0 LP38691SDX-ADJ/NOPB WSON NGG 6 4500 346.0 346.0 35.
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MECHANICAL DATA NDC0005A www.ti.
PAGE 21
MECHANICAL DATA NGG0006A SDE06A (Rev A) www.ti.
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