Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positivbe, adjustable SO 8 PowerPad

OUT

S/D

OUT

GND

BIAS

LP38841-

ADJ

BIAS

5V ± 10%

GND

0.1 PF

10 PF

Ceramic

S/D

ADJ

4.7 PF

LP38841-ADJ

www.ti.com

SNVS305C –FEBRUARY 2005–REVISED APRIL 2013

LP38841-ADJ 0.8A Ultra Low Dropout Adjustable Linear Regulators

Stable with Ceramic Output Capacitors

Check for Samples: LP38841-ADJ

FEATURES

DESCRIPTION

The LP38841-ADJ is a high current, fast response

• Ideal for Conversion from 1.8V or 1.5V Inputs

regulator which can maintain output voltage

• Designed for Use with Low ESR Ceramic

regulation with minimum input to output voltage drop.

Capacitors

Fabricated on a CMOS process, the device operates

• Ultra Low Dropout Voltage (75mV @ 0.8A Typ)

from two input voltages: Vbias provides voltage to

drive the gate of the N-MOS power transistor, while

• 0.56V to 1.5V Adjustable Output Range

Vin is the input voltage which supplies power to the

• Load Regulation of 0.1%/A (Typ)

load. The use of an external bias rail allows the part

• 30nA Quiescent Current in Shutdown (Typ)

to operate from ultra low Vin voltages. Unlike bipolar

regulators, the CMOS architecture consumes

• Low Ground Pin Current at all Loads

extremely low quiescent current at any output load

• Over Temperature/Over Current Protection

current. The use of an N-MOS power transistor

• Available in 8 Lead SO

results in wide bandwidth, yet minimum external

capacitance is required to maintain loop stability.

• −40°C to +125°C Junction Temperature Range

• UVLO Disables Output when V

BIAS

< 3.8V

The fast transient response of these devices makes

them suitable for use in powering DSP,

Microcontroller Core voltages and Switch Mode

APPLICATIONS

Power Supply post regulators. The parts are available

• ASIC Power Supplies In:

in the SO package.

– Desktops, Notebooks, and Graphics Cards,

Dropout Voltage: 75 mV (typ) @ 0.8A load current.

Servers

Quiescent Current: 30 mA (typ) at full load.

– Gaming Set Top Boxes, Printers and

Copiers

Shutdown Current: 30 nA (typ) when S/D pin is low.

• Server Core and I/O Supplies

Precision Reference Voltage: 1.5% room

• DSP and FPGA Power Supplies

temperature accuracy.

• SMPS Post-Regulators

Typical Application Circuit

* Minimum value required if Tantalum capacitor is used (see APPLICATION HINTS).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (15 pages)

PAGE 1
LP38841-ADJ www.ti.com SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 LP38841-ADJ 0.8A Ultra Low Dropout Adjustable Linear Regulators Stable with Ceramic Output Capacitors Check for Samples: LP38841-ADJ FEATURES DESCRIPTION • • The LP38841-ADJ is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop.
PAGE 2
LP38841-ADJ SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 www.ti.com Connection Diagram ADJ 1 OUTPUT 2 BIAS 3 GND 4 DAP 8 N/C 7 INPUT 6 SHUTDOWN 5 GND Figure 1. SO-8 – Top View PIN DESCRIPTION Pin Number Pin Name Pin Description 1 ADJ 2 OUTPUT 3 BIAS The Bias pin is used to provide the low current bias voltage to the chip which operates the internal circuitry and provides drive voltage for the N-FET. 4, 5 GND These are the power and analog grounds for the IC. Connect both pins to ground.
PAGE 3
LP38841-ADJ www.ti.com SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 ABSOLUTE MAXIMUM RATINGS (1) (2) −65°C to +150°C Storage Temperature Range Lead Temp. (Soldering, 5 seconds) 260°C Human Body Model (3) ESD Rating 2 kV Machine Model (4) 200V Power Dissipation (5) Internally Limited VIN Supply Voltage (Survival) −0.3V to +6V VBIAS Supply Voltage (Survival) −0.3V to +7V Shutdown Input Voltage (Survival) −0.3V to +7V VADJ -0.3V to +6V IOUT (Survival) (6) Internally Limited −0.
PAGE 4
LP38841-ADJ SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = 10 µF CER, COUT = 22 µF CER, VS/D = VBIAS. Min/Max limits are specified through testing, statistical correlation, or design.
PAGE 5
LP38841-ADJ www.ti.com SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified: TJ = 25°C, CIN = 10 µF CER, COUT = 22 µF CER, CBIAS = 1 µF CER, S/D Pin is tied to VBIAS, VOUT = 1.2V, IL = 10mA, VBIAS = 5V, VIN = VOUT + 1V. VBIAS Transient Response Dropout Voltage Over Temperature 125oC VBIAS VBIAS = 5V 0.10 5 10 VOUT 0 IL = 10 mA -10 'VOUT (mV) 4 25oC 0.08 -40oC 0.06 0.04 0.02 VOUT = 1.2V VIN = 1.7V 0 0 0.2 0.4 20 Ps/DIV Figure 2.
PAGE 6
LP38841-ADJ SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: TJ = 25°C, CIN = 10 µF CER, COUT = 22 µF CER, CBIAS = 1 µF CER, S/D Pin is tied to VBIAS, VOUT = 1.2V, IL = 10mA, VBIAS = 5V, VIN = VOUT + 1V. Load Transient Response ILOAD ILOAD (A) 1 0 20 VOUT 0 -20 VOUT = 0.8V 'VOUT (mV) 'VOUT (mV) ILOAD (A) 1 Load Transient Response 0 20 VOUT 0 -20 COUT = 4.7 PF Tant. 20 Ps/DIV VOUT = 0.8V COUT =22 PF Cer.
PAGE 7
LP38841-ADJ www.ti.com SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 APPLICATION HINTS SETTING THE OUTPUT VOLTAGE (Refer to Typical Application Circuit) The output voltage is set using the resistive divider R1 and R2. The output voltage is given by the formula: VOUT = VADJ x (1 + R1 / R2) (1) The value of R2 must be 10k or less for proper operation. EXTERNAL CAPACITORS To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit.
PAGE 8
LP38841-ADJ SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 www.ti.com BIAS VOLTAGE The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage must be in the range of 4.5 - 5.5V to assure proper operation of the part. UNDER VOLTAGE LOCKOUT The bias voltage is monitored by a circuit which prevents the regulator output from turning on if the bias voltage is below approximately 3.8V.
PAGE 9
LP38841-ADJ www.ti.com SNVS305C – FEBRUARY 2005 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision B (April 2013) to Revision C • Page Changed layout of National Data Sheet to TI format ............................................................................................................
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device LP38841MRX-ADJ/NOPB Package Package Pins Type Drawing SO Power PAD DDA 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.4 2.0 8.0 W Pin1 (mm) Quadrant 12.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP38841MRX-ADJ/NOPB SO PowerPAD DDA 8 2500 367.0 367.0 35.
PAGE 14
MECHANICAL DATA DDA0008B MRA08B (Rev B) www.ti.
PAGE 15
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.