Datasheet

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LP3963, LP3966

www.ti.com

SNVS067H –APRIL 2000–REVISED APRIL 2013

LP3963/LP3966 3A Fast Ultra Low Dropout Linear Regulators

Check for Samples: LP3963, LP3966

FEATURES

DESCRIPTION

The LP3963/LP3966 series of fast ultra low-dropout

• Ultra Low Dropout Voltage

linear regulators operate from a +2.5V to +7.0V input

• Low Ground Pin Current

supply. Wide range of preset output voltage options

• Load Regulation of 0.06%

are available. These ultra low dropout linear

regulators respond very quickly to step changes in

• 15µA Quiescent Current in Shutdown Mode

load which makes them suitable for low voltage

• Specified Output Current of 3A DC

microprocessor applications. The LP3963/LP3966 are

• Available in DDPAK/TO-263 and TO-220

developed on a CMOS process which allows low

Packages

quiescent current operation independent of output

load current. This CMOS process also allows the

• Output Voltage Accuracy ± 1.5%

LP3963/LP3966 to operate under extremely low

• Error Flag Indicates Output Status (LP3963)

dropout conditions.

• Sense Option Improves Load Regulation

Dropout Voltage: Ultra low dropout voltage; typically

(LP3966)

80mV at 300mA load current and 800mV at 3A load

• Minimum Output Capacitor Requirements

current.

• Overtemperature/Overcurrent Protection

Ground Pin Current: Typically 6mA at 3A load

• −40°C to +125°C Junction Temperature Range

current.

Shutdown Mode: Typically 15µA quiescent current

APPLICATIONS

when the shutdown pin is pulled low.

• Microprocessor Power Supplies

Error Flag: Error flag goes low when the output

• GTL, GTL+, BTL, and SSTL Bus Terminators

voltage drops 10% below nominal value (for LP3963).

• Power Supplies for DSPs

SENSE: Sense pin improves regulation at remote

• SCSI Terminator

loads. (For LP3966)

• Post Regulators

Precision Output Voltage: Multiple output voltage

• High Efficiency Linear Regulators

options are available ranging from 1.2V to 5.0V and

adjustable (LP3966), with a specified accuracy of

• Battery Chargers

±1.5% at room temperature, and ±3.0% over all

• Other Battery Powered Applications

conditions (varying line, load, and temperature).

Typical Application Circuits

*SD and ERROR pins must be pulled high through a 10kΩ pull-up resistor. Connect the ERROR pin to ground if this

function is not used. See Application Hints for more information.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 LP3963/LP3966 3A Fast Ultra Low Dropout Linear Regulators Check for Samples: LP3963, LP3966 FEATURES DESCRIPTION • • • • • • The LP3963/LP3966 series of fast ultra low-dropout linear regulators operate from a +2.5V to +7.0V input supply. Wide range of preset output voltage options are available.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com *SD and ERROR pins must be pulled high through a 10kΩ pull-up resistor. Connect the ERROR pin to ground if this function is not used. See Application Hints for more information.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 Block DiagramLP3966 Block DiagramLP3966-ADJ Connection Diagram Figure 1. Top View TO-220-5 Package Bent, Staggered Leads Figure 2.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com Pin Descriptions for TO-220-5 and DDPAK/TO-263-5 Packages LP3963 Pin # Name LP3966 Function Name Function 1 SD Shutdown SD Shutdown 2 VIN Input Supply VIN Input Supply 3 GND Ground GND Ground 4 VOUT Output Voltage VOUT Output Voltage 5 ERROR ERROR Flag SENSE/ADJ Remote Sense Pin/Output Adjust Pin These devices have limited built-in ESD protection.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 Electrical Characteristics LP3963/LP3966 Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1.5V, IL = 10 mA, COUT =33µF, VSD = VIN-0.3V. Symbol Parameter Conditions Typ (1) LP3963/6 (2) Min Max Units Output Voltage Tolerance (3) VOUT +1.5V < VIN< 7.0V 10 mA < IL < 3A 0 -1.5 -3.0 +1.5 +3.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com Electrical Characteristics LP3963/LP3966 (continued) Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1.5V, IL = 10 mA, COUT =33µF, VSD = VIN-0.3V. Symbol Parameter Conditions Typ (1) LP3963/6 Min Ilk Imax Error Flag Pin Leakage Current Error Flag Pin Sink Current (2) Units Max 1 nA VError = 0.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified, VIN = VO(NOM) + 1.5V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. Drop-Out Voltage Vs Temperature for Different Load Currents Drop-Out Voltage Vs Temperature (IL = 100mA, 1A, VOUT = 2.5V, Dropout at 50mV Down) Figure 3. Figure 4. Ground Pin Current Vs Input Voltage (VSD=VIN) Ground Pin Current Vs Input Voltage (VSD=100mV) Figure 5.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, VIN = VO(NOM) + 1.5V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. 8 Ground Pin Current Vs Shutdown Pin Voltage Input Voltage Vs Output Voltage Figure 9. Figure 10. Output Noise Density, VOUT= 2.5V Output Noise Density, VOUT= 5V Figure 11. Figure 12. Load Transient Response Ripple Rejection vs Frequency Figure 13.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified, VIN = VO(NOM) + 1.5V, VOUT= 2.5V, COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25°C. δVOUT vs Temperature Noise Density VIN = 3.5V, VOUT = 2.5V, IL = 10 mA Figure 15. Figure 16. Line Transient Response Line Transient Response Figure 17. Figure 18. Line Transient Response (IOUT = 3.0A) Line Transient Response (IOUT = 3.0A) Figure 19.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com APPLICATION HINTS EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctly selected for proper performance. INPUT CAPACITOR: The LP3963/6 requires a low source impedance to maintain regulator stability because the internal bias circuitry is connected directly to VIN.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 CAPACITOR CHARACTERISTICS CERAMIC: For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a function of voltage and temperature.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com RFI/EMI SUSCEPTIBILITY RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must be taken to ensure that this does not affect the IC regulator.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com SENSE PIN In applications where the regulator output is not very close to the load, LP3966 can provide better remote load regulation using the SENSE pin. Figure 22 depicts the advantage of the SENSE option. LP3963 regulates the voltage at the output pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 The maximum allowable temperature rise (TRmax) depends on the maximum ambient temperature (TAmax) of the application, and the maximum allowable junction temperature (TJmax): TRmax = TJmax− TAmax The maximum allowable value for junction to ambient Thermal Resistance, θJA, can be calculated using the formula: θJA = TRmax / PD LP3963 and LP3966 are available in TO-220 and DDPAK/TO-263 packages.
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LP3963, LP3966 SNVS067H – APRIL 2000 – REVISED APRIL 2013 www.ti.com Figure 24.
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LP3963, LP3966 www.ti.com SNVS067H – APRIL 2000 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision G (April 2013) to Revision H • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3963ES-2.5 NRND DDPAK/ TO-263 KTT 5 45 TBD Call TI Call TI -40 to 125 LP3963ES -2.5 LP3963ES-2.5/NOPB ACTIVE DDPAK/ TO-263 KTT 5 45 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3963ES -2.5 LP3963ES-3.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3966ESX-1.8/NOPB ACTIVE DDPAK/ TO-263 KTT 5 500 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 LP3966ES -1.8 LP3966ESX-2.5 NRND DDPAK/ TO-263 KTT 5 500 TBD Call TI Call TI -40 to 125 LP3966ES -2.5 LP3966ESX-2.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3963ESX-2.5 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP3963ESX-2.5/NOPB DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 LP3963ESX-3.3 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.75 14.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TO-263 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3963ESX-2.5 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3963ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3963ESX-3.3 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.
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MECHANICAL DATA NDH0005D www.ti.
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MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.
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