Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed VSSOP 8

2.2PF

SHDN

GND

OUT

FAULT

100k

2.2PF

CERAMIC

33n

LP3982

www.ti.com

SNVS185D –FEBRUARY 2002–REVISED APRIL 2013

LP3982 Micropower, Ultra Low-Dropout, Low-Noise, 300 mA CMOS Regulator

Check for Samples: LP3982

FEATURES

DESCRIPTION

The LP3982 low-dropout (LDO) CMOS linear

• MAX8860 Pin, Package and Spec. Compatible

regulator is available in 1.8V, 2.5V, 2.77V, 2.82V,

• WSON Space Saving Package

3.0V, 3.3V, and adjustable versions. They deliver 300

• 300 mA Output Current

mA of output current. Packaged in an 8-Pin VSSOP,

the LP3982 is pin and package compatible with

• 120 mV Typical Dropout @ 300 mA

Maxim's MAX8860. The LM3982 is also available in

• 90 μA Typical Quiescent Current

the small footprint WSON package.

• 1 nA Typical Shutdown Mode

The LP3982 suits battery-powered applications

• 60 dB Typical PSRR

because of its shutdown mode (1nA typ), low

• 2.5V to 6V Input Range

quiescent current (90 μA typ), and LDO voltage (120

mV typ). The low dropout voltage allows for more

• 120μs Typical Turn-on Time

utilization of a battery’s available energy by operating

• Stable with Small Ceramic Output Capacitors

closer to its end-of-life voltage. The LP3982's PMOS

• 37 μV RMS Output Voltage Noise (10 Hz to 100

output transistor consumes relatively no drive current

kHz)

compared to PNP LDO regulators.

• Over-Temperature/Over-Current Protection

This PMOS regulator is stable with small ceramic

• ±2% Output Voltage Tolerance

capacitive loads (2.2 μF typ).

These devices also include regulation fault detection,

APPLICATIONS

a bandgap voltage reference, constant current limiting

and thermal overload protection.

• Wireless Handsets

• DSP Core Power

• Battery Powered Electronics

• Portable Information Appliances

Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 LP3982 Micropower, Ultra Low-Dropout, Low-Noise, 300 mA CMOS Regulator Check for Samples: LP3982 FEATURES DESCRIPTION • • • • • • • • • • • The LP3982 low-dropout (LDO) CMOS linear regulator is available in 1.8V, 2.5V, 2.77V, 2.82V, 3.0V, 3.3V, and adjustable versions. They deliver 300 mA of output current. Packaged in an 8-Pin VSSOP, the LP3982 is pin and package compatible with Maxim's MAX8860.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) (3) −0.3V to 6.
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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS (continued) Unless otherwise specified, all limits specified for VIN = VO +0.5V(1), VSHDN = VIN, CIN = COUT = 2.2μF, CCC = 33nF, TJ = 25°C. Boldface limits apply for the operating temperature extremes: −40°C and 85°C. Symbol VDO Parameter Dropout Voltage ΔVO en VSHDN Min (2) Conditions (1) (4) IOUT = 1 mA Typ (3) Max (2) Units 220 mV 0.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified, VIN = VO + 0.5V, CIN = COUT = 2.2 μF, CCC = 33 nF, TJ = 25°C, VSHDN = VIN. Dropout Voltage vs. Load Current (For Different Output Voltages) Dropout Voltage vs. Load Current (For Different Output Temperatures) 160 140 VO = 2.77V 140 25°C DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 120 100 VO = 2.5V 80 VO = 3.
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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VIN = VO + 0.5V, CIN = COUT = 2.2 μF, CCC = 33 nF, TJ = 25°C, VSHDN = VIN. Output Noise Spectral Density Output Noise (10Hz to 100kHz) 1 100 PV/DIV NOISE (PV/ Hz) 10 COUT = 10PF 0.1 COUT = 2.2PF 0.01 100 10 k FREQUENCY (Hz) 1k 1 ms/DIV 100k Figure 8. Figure 9. Output Impedance vs. Frequency Line Transient Response 2 VIN (V) 1.6 1.4 IL = 300mA 4.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VIN = VO + 0.5V, CIN = COUT = 2.2 μF, CCC = 33 nF, TJ = 25°C, VSHDN = VIN. VIN 1 V/DIV VIN VO 2 V/DIV FAULT Power-Down Response 1 V/DIV 2 V/DIV Power-Up Response FAULT VIN VO VIN VO VO 5 ms/DIV 5 mS/DIV Figure 14. 6 Figure 15.
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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 APPLICATION INFORMATION General Information The LP3982 is package, pin and performance compatible with Maxim's MAX8860 excluding reverse battery protection and Dual Mode function (fixed and adjustable combined). Figure 16 shows the functional block diagram for the LP3982. A 1.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com VIN VREF + VOUT - R1 R2 Figure 17. Regulator Topology Simplified Similarity in the output capabilities exists between op amps and linear regulators. Just as rail-to-rail output op amps allow their output voltage to approach the supply voltage, low dropout regulators (LDOs) allow their output voltage to operate close to the input voltage. Both achieve this by the configuration of their output transistors.
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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 LOOP GAIN - RO VREF ESR + CL RL Figure 18. Simplified Model of Regulator Loop Gain Components Figure 18 shows a basic model for the linear regulator that helps describe what happens to the output signal as it is processed through its feedback loop; that is, describe its loop gain (LG). The LG includes two main transfer functions: the error amplifier and the load.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com Input Capacitor The LP3982 requires a minimum input capacitance of about 1μF. The value may be increased indefinitely. The type is not critical to stability. However, instability may occur with bench set-ups where long supply leads are used, particularly at near dropout and high current conditions.
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LP3982 www.ti.com TJA SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 (160 - TA) (0.300 x VD) (6) Fault Detection The LP3982 provides a FAULT pin that goes low during out of regulation conditions like current limit and thermal shutdown, or when it approaches dropout. The latter monitors the input-to-output voltage differential and compares it against a threshold that is slightly above the dropout voltage. This threshold also tracks the dropout voltage as it varies with load current.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com VB OUT IN R1 768k R4 180k + 4 Cells NiMH R2 2.2PF 2.74M 100k 2.2PF CERAMIC VB LMC7215 FAULT SHDN GND R3 301k LP3982 VREF LM385A-1.2V Figure 21.
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LP3982 www.ti.com SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 Connection Diagram The set pin is internally disconnected for the fixed versions. 1 8 FAULT OUT IN 2 3 GND OUT 4 7 6 5 SHD N OUT 1 IN 2 8 FAULT 7 SHDN GND GND 3 6 CC OUT 4 5 SET CC SET * Figure 22. 8-Pin VSSOP Top View Figure 23.
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LP3982 SNVS185D – FEBRUARY 2002 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D • 14 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3982ILD-1.8 NRND WSON NGM 8 1000 TBD Call TI Call TI -40 to 85 LNB LP3982ILD-1.8/NOPB ACTIVE WSON NGM 8 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 LNB LP3982ILD-2.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 1-Nov-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LP3982IMM-ADJ/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LEVB LP3982IMMX-1.8/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LENB LP3982IMMX-2.
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PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3982ILD-1.8 WSON NGM 8 1000 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1 LP3982ILD-1.8/NOPB WSON NGM 8 1000 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1 LP3982ILD-2.5/NOPB WSON NGM 8 1000 178.0 12.4 3.3 2.8 1.0 8.0 12.0 Q1 LP3982ILD-3.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3982IMM-ADJ VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP3982IMM-ADJ/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP3982IMMX-1.8/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP3982IMMX-2.5/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3982IMM-1.8 VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-1.8/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-2.5 VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-2.5/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-3.0 VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-3.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP3982IMM-3.
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MECHANICAL DATA NGM0008C LDA08C (Rev B) www.ti.
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