Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed DSBGA 5

LP3999

Enable Control,

Active high

Load

BYPASS

10 nF

1.0 uF

1.0 PF

OUT

GND

LP3999

www.ti.com

SNVS207E –JUNE 2003–REVISED MAY 2013

LP3999 Low Noise 150mA Voltage Regulator for RF/Analog Applications

Check for Samples: LP3999

FEATURES

APPLICATIONS

• 5 pin DSBGA Package

• GSM Portable Phones

• Stable with Ceramic Capacitor • CDMA Cellular Handsets

• Logic Controlled Enable • Wideband CDMA Cellular Handsets

• Fast Turn-on • Bluetooth Devices

• Thermal-overload and short-circuit protection • Portable Information Appliances

• −40 to +125°C junction temperature range for • Handheld MP3 Devices

operation

DESCRIPTION

KEY SPECIFICATIONS

The LP3999 regulator is designed to meet the

requirements of portable wireless battery-powered

• 2.5V to 6.0V Input Range

applications and will provide an accurate output

• Accurate Output Voltage; ±75mV / 2%

voltage with low noise and low quiescent current.

• 60 mV Typical Dropout with 150 mA Load. V

out

Ideally suited for powering RF/Analog devices this

device will also be used to meet more general circuit

> 2.5V

requirements.

• Virtually Zero Quiescent Current when

Disabled

For battery powered applications the low dropout and

low ground current provided by the device allows the

• 10 μVrms Output Noise Over 10Hz to 100kHz

lifetime of the battery to be maximized.The inclusion

• Stable with a 1 μF Output Capacitor

of an Enable(disable) control can be used by the

• Ensured 150 mA Output Current

system to further extend the battery lifetime by

reducing the power consumption to virtually zero.

• Fast Turn-on Time; 140 μs (Typ.)

Should the application require a device with an active

disable function please refer to device LP3995.

The LP3999 also features internal protection against

short-circuit currents and over-temperature

conditions.

Typical Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (19 pages)

PAGE 1
LP3999 www.ti.
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LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 www.ti.com DESCRIPTION (CONTINUED) The LP3999 is designed to be stable with small 1.0 µF ceramic capacitors. The small outline of the LP3999 DSBGA package with the required ceramic capacitors can realize a system application within minimal board area. Performance is specified for a −40°C to +125°C temperature range. The device is available in DSBGA package. For other package options contact your local TI sales office.
PAGE 3
LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) (2) Orderable Device Output Voltage (V) LP399ITL-1.5/NOPB 1.5 LP399ITLX-1.5/NOPB LP399ITL-1.8/NOPB 1.8 LP399ITLX-1.8/NOPB LP399ITL-1.875/NOPB LP399ITLX-1.875/NOPB LP399ITL-2.4/NOPB 2.4 LP399ITLX-2.
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LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 Operating Ratings www.ti.com (1) Input Voltage (VIN) 2.5 to 6.0V Enable Input Voltage 0 to 6.0V −40 to +125°C Junction Temperature Ambient Temperature Range (2) (1) (2) -40 to 85°C Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply ensured performance limits.
PAGE 5
LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 Electrical Characteristics (continued) Unless otherwise noted, VEN = 1.5, VIN = VOUT(NOM) + 1.0V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, CBP = 0.01 µF. Typical values and limits appearing in normal type apply for TJ = 25°C. Limits appearing in boldface type apply over the full temperature range for operation, −40 to +125°C.
PAGE 6
LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 www.ti.com INPUT TEST SIGNALS 30 us 30 us | 600 mV VIN = VOUT(NOM) + 1V 600 us 4.6 ms Figure 1. Line Transient Response Input Test Signal 50 mV VIN = VOUT(NOM) + 1V Figure 2.
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LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified, CIN = COUT = 1.0 µF Ceramic, VIN = VOUT + 1.0V, TA = 25°C, Enable pin is tied to VIN. Output Voltage Change vs Temperature Ground Current vs Load Current (1.8V VOUT) Figure 3. Figure 4. Ground Current vs VIN @ 25°C Ground Current vs VIN @125°C Figure 5. Figure 6. Ground Current vs VIN @ -40°C Short Circuit Current Figure 7. Figure 8.
PAGE 8
LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, CIN = COUT = 1.0 µF Ceramic, VIN = VOUT + 1.0V, TA = 25°C, Enable pin is tied to VIN. 8 Line Transient Response (1.8V VOUT) Line Transient Response (1.5V VOUT) Figure 9. Figure 10. Ripple Rejection (1.8V VOUT) Ripple Rejection (1.5V VOUT) Figure 11. Figure 12. Enable Start-Up Time (VOUT = 1.8V) Enable Start-Up Time (VOUT = 1.8V) Figure 13. Figure 14.
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LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, CIN = COUT = 1.0 µF Ceramic, VIN = VOUT + 1.0V, TA = 25°C, Enable pin is tied to VIN. Enable Start-Up Time (VOUT = 1.5V) Enable Start-Up Time (VOUT = 1.5V) Figure 15. Figure 16. Load Transient Response (VOUT = 1.8V) Load Transient Response (VOUT = 1.5V) Figure 17. Figure 18. Output Noise Density VIN = 4.2V VOUT = 2.5V) Figure 19.
PAGE 10
LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 www.ti.com APPLICATION HINTS POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air.
PAGE 11
LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 NO-LOAD STABILITY The LP3999 will remain stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications. CAPACITOR CHARACTERISTICS The LP3999 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 1 µF to 4.
PAGE 12
LP3999 SNVS207E – JUNE 2003 – REVISED MAY 2013 www.ti.com Referring to the section Surface Mount Assembly Considerations, it should be noted that the pad style which must be used with the 5 pin package is NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the DSBGA device. DSBGA LIGHT SENSITIVITY Exposing the DSBGA device to direct sunlight will cause incorrect operation of the device.
PAGE 13
LP3999 www.ti.com SNVS207E – JUNE 2003 – REVISED MAY 2013 REVISION HISTORY Changes from Revision D (May 2013) to Revision E • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.com 3-May-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LP3999ITL-1.5/NOPB ACTIVE DSBGA YZR 5 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 9 LP3999ITL-1.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 3-May-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LP3999ITL-1.5/NOPB DSBGA YZR 5 250 178.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.09 1.55 0.76 4.0 8.0 Q1 LP3999ITL-1.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.09 1.55 0.76 4.0 8.0 Q1 LP3999ITL-1875/NOPB DSBGA YZR 5 250 178.0 8.4 1.09 1.55 0.76 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3999ITL-1.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LP3999ITL-1.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LP3999ITL-1875/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LP3999ITL-2.4/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LP3999ITL-2.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LP3999ITL-2.
PAGE 18
MECHANICAL DATA YZR0005xxx D 0.600±0.075 E TLA05XXX (Rev C) D: Max = 1.502 mm, Min =1.441 mm E: Max = 1.045 mm, Min =0.984 mm 4215043/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.
PAGE 19
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.