Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Multi-purpose SOIC 14 N

LPC660

www.ti.com

SNOS554D –MAY 1998–REVISED MARCH 2013

LPC660 Low Power CMOS Quad Operational Amplifier

Check for Samples: LPC660

FEATURES

DESCRIPTION

The LPC660 CMOS Quad operational amplifier is

• Rail-to-rail output swing

ideal for operation from a single supply. It features a

• Micropower operation: (1 mW)

wide range of operating voltages from +5V to +15V

• Specified for 100 kΩ and 5 kΩ loads

and features rail-to-rail output swing in addition to an

input common-mode range that includes ground.

• High voltage gain: 120 dB

Performance limitations that have plagued CMOS

• Low input offset voltage: 3 mV

amplifiers in the past are not a problem with this

• Low offset voltage drift: 1.3 μV/°C

design. Input V

, drift, and broadband noise as well

as voltage gain (into 100 kΩ and 5 kΩ) are all equal

• Ultra low input bias current: 2 fA

to or better than widely accepted bipolar equivalents,

• Input common-mode includes V

−

while the power supply requirement is typically less

• Operation range from +5V to +15V

than 1 mW.

• Low distortion: 0.01% at 1 kHz

This chip is built with National's advanced Double-

• Slew rate: 0.11 V/μs

Poly Silicon-Gate CMOS process.

• Full military temp. range available

See the LPC662 datasheet for a Dual CMOS

operational amplifier and LPC661 datasheet for a

APPLICATIONS

single CMOS operational amplifier with these same

features.

• High-impedance buffer

• Precision current-to-voltage converter

• Long-term integrator

• High-impedance preamplifier

• Active filter

• Sample-and-Hold circuit

• Peak detector

Application Circuit

Oscillator frequency is determined by R1, R2, C1, and C2:

OSC

= 1/2πRC

where R = R1 = R2 and C = C1 = C2.

Figure 1. Sine-Wave Oscillator

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

PAGE 1
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 LPC660 Low Power CMOS Quad Operational Amplifier Check for Samples: LPC660 FEATURES DESCRIPTION • • • • • • • • • • • • The LPC660 CMOS Quad operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltages from +5V to +15V and features rail-to-rail output swing in addition to an input common-mode range that includes ground.
PAGE 2
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) Differential Input Voltage ±Supply Voltage Supply Voltage (V+ − V−) 16V Output Short Circuit to V+ (2) − (3) Output Short Circuit to V Lead Temperature (Soldering, 10 sec.
PAGE 3
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V, and RL > 1M unless otherwise specified. LPC660AM Parameter Conditions Typ LPC660AMJ/883 Limit Input Offset Voltage 1 Input Offset Voltage Average Drift (1) (2) Limit 3 6 mV 3.5 3.3 6.3 max μV/°C 0.002 Input Offset Current 20 0.
PAGE 4
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com DC Electrical Characteristics (continued) Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5V, and RL > 1M unless otherwise specified. LPC660AM Parameter Conditions Typ LPC660AMJ/883 Limit Output Swing V+ = 5V 4.987 4.940 V 4.950 4.910 min 0.030 0.030 0.060 V 0.050 0.050 0.090 max 4.850 4.850 4.750 V 4.750 4.750 4.
PAGE 5
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25°C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = 0V, VCM = 1.5V, VO = 2.5, and RL > 1M unless otherwise specified. LPC660AM Parameter Conditions Typ LPC660AMJ/883 Limit Slew Rate (3) 0.11 Gain-Bandwidth Product (1) (2) LPC660AI Limit (1) LPC660I Limit 0.07 0.07 0.05 0.04 0.05 0.03 Units (1) V/μs min 0.
PAGE 6
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VS = ±7.5V, TA = 25°C unless otherwise specified 6 Supply Current vs. Supply Voltage Input Bias Current vs. Temperature Figure 2. Figure 3. Common-Mode Voltage Range vs. Temperature Output Characteristics Current Sinking Figure 4. Figure 5. Output Characteristics Current Sourcing Input Voltage Noise vs. Frequency Figure 6. Figure 7.
PAGE 7
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C unless otherwise specified Crosstalk Rejection vs. Frequency CMRR vs. Frequency Figure 8. Figure 9. CMRR vs. Temperature Power Supply Rejection Ratio vs. Frequency Figure 10. Figure 11. Open-Loop Voltage Gain vs. Temperature Open-Loop Frequency Response Figure 12. Figure 13.
PAGE 8
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C unless otherwise specified 8 Gain and Phase Responses vs. Load Capacitance Gain and Phase Responses vs. Temperature Figure 14. Figure 15. Gain Error (VOSvs. VOUT) Non-Inverting Slew Rate vs. Temperature Figure 16. Figure 17. Inverting Slew Rate vs. Temperature Large-Signal Pulse Non-Inverting Response (AV = +1) Figure 18. Figure 19.
PAGE 9
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C unless otherwise specified Non-Inverting Small Signal Pulse Response (AV = +1) Inverting Large-Signal Pulse Response Figure 20. Figure 21. Inverting Small-Signal Pulse Response Stability vs. Capacitive Load Figure 22. Note: Avoid resistive loads of less than 500Ω, as they may cause instability. Figure 23. Stability vs. Capacitive Load Figure 24.
PAGE 10
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com Application Hints AMPLIFIER TOPOLOGY The topology chosen for the LPC660 is unconventional (compared to general-purpose op amps) in that the traditional unity-gain buffer output stage is not used; instead, the output is taken directly from the output of the integrator, to allow rail-to-rail output swing.
PAGE 11
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 27). Typically a pull up resistor conducting 50 μA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing.
PAGE 12
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com Figure 29. (a) Inverting Amplifier Figure 30. (b) Non-Inverting Amplifier Figure 31. (c) Follower Figure 32.
PAGE 13
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) Figure 33. Air Wiring BIAS CURRENT TESTING The test method of Figure 34 is appropriate for bench-testing bias current with reasonable accuracy. To understand its operation, first close switch S2 momentarily. When S2 is opened, then (1) Figure 34.
PAGE 14
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com Typical Single-Supply Applications — (V+ = 5.0 VDC) Figure 35. Photodiode Current-to-Voltage Converter Note: A 5V bias on the photodiode can cut its capacitance by a factor of 2 or 3, leading to improved response and lower noise. However, this bias on the photodiode will cause photodiode leakage (also known as its dark current). Figure 36.
PAGE 15
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 Figure 38. Instrumentation Amplifier For good CMRR over temperature, low drift resistors should be used. Matching of R3 to R6 and R4 to R7 affects CMRR. Gain may be adjusted through R2. CMRR may be adjusted through R7. Figure 39. Sine-Wave Oscillator Oscillator frequency is determined by R1, R2, C1, and C2: fOSC = 1/2πRC where R = R1 = R2 and C = C1 = C2. Figure 40.
PAGE 16
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com This circuit, as shown, oscillates at 2.0 kHz with a peak-to-peak output swing of 4.5V Figure 41. Power Amplifier Figure 42. 10 Hz Bandpass Filter fO = 10 Hz Q = 2.1 Gain = −8.8 Figure 43. 10 Hz High-Pass Filter (2 dB Dip) fc = 10 Hz d = 0.895 Gain = 1 Figure 44.
PAGE 17
LPC660 www.ti.com SNOS554D – MAY 1998 – REVISED MARCH 2013 Figure 45. High Gain Amplifier with Offset Voltage Reduction Gain = −46.8 Output offset voltage reduced to the level of the input offset voltage of the bottom amplifier (typically 1 mV), referred to VBIAS. Connection Diagram Top View Figure 46.
PAGE 18
LPC660 SNOS554D – MAY 1998 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision C (March 2013) to Revision D • 18 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
PAGE 19
PACKAGE OPTION ADDENDUM www.ti.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LPC660AIMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LPC660IMX SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LPC660IMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LPC660AIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LPC660IMX SOIC D 14 2500 367.0 367.0 35.0 LPC660IMX/NOPB SOIC D 14 2500 367.0 367.0 35.
PAGE 23
PAGE 24
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.