User's Guide Analog-to-Digital Converter MSC1210

Timers
17-8
void interrupt_timer0 ( ) interrupt 1 using 1
{ /*This ISR is called when a type 1 interrupt causes the processor to vector
into the code segment address 0x0006.
Register Bank 1 is used, as opposed to the default Register Bank 0.*/
IE &= 0x7f; //disable global interrupt
timer_0_overflow_count++; //Track number of times this ISR is called
//Reinitialize Timer 0 counters
TH0 = count_start / 256; //set THO for timer0
TL0 = count_start % 256; //set TLO for timer0
IE |= 0x80; //enable global interrupt
}
**************************interrupt_external 0 ( )********************************
Timer 0 is set up as a gated timer. This implies that while GATE is high and if
the INT0 is low, there should not be any time count, regardless of the fact that
the TR0 line is asserted. Hence, the Timer 0 status window displays stop.
While the GATE is high and TR0 is to logic 1, if the INT0
line is raised, the timer
starts running, changing the status display to run. It continues running until the
INT0
line is dropped. This is essentially a pulse-width measurement program.
If the number of calls is odd, the TR0 bit for timer 0 is reset, which effectively
stops the timer, regardless of the state of GATE and INT0
. The status window
now displays stop. The global variable end_test is set to a value of 1. This al-
lows the process to terminate the idle loop in the main program.
void interrupt_external0 (void) interrupt 2 using 1
{ /*This ISR is called when a type 2 interrupt causes the processor to vector
into the code segment address 0x0013.
Register Bank 1 is used, as opposed to the default Register Bank 0.*/
static i; //declare static variable i, in order to track odd and even
//number of calls to this ISR
if (!(i++ % 2))
{//even number of calls including 0
//turn on timer0
TCON |= 0x10; //Start timer0 by setting TR0 = 1
}
else
{//odd number of calls
TCON &= 0xef; //Stop timer0 by setting TR0 = 0
end_test = 1;
}
}
*********************************main ( )****************************************