User's Guide Analog-to-Digital Converter MSC1210

8052 Instruction Set
E-24
SWAP Subtract Accumulator Nibbles
Syntax SWAP A
Instructions OpCode Bytes Cycles Flags
SWAP A 0xC4 1 1 None
SWAP swaps bits 0−3 of the accumulator with bits 4−7 of the accumulator. This
instruction is identical to executing RR A or RL A four times.
See also: RL, RLC, RR, RRC
XCH Exchange Bytes
Syntax XCH A,register
Instructions OpCode Bytes Cycles Flags
XCH A,@R0 0xC6 1 1 None
XCH A,@R1 0xC7 1 1 None
XCH A,R0 0xC8 1 1 None
XCH A,R1 0xC9 1 1 None
XCH A,R2 0xCA 1 1 None
XCH A,R3 0xCB 1 1 None
XCH A,R4 0xCC 1 1 None
XCH A,R5 0xCD 1 1 None
XCH A,R6 0xCE 1 1 None
XCH A,R7 0xCF 1 1 None
XCH A,direct 0xC5 2 1 None
XCH exchanges the value of the accumulator with the value contained in register.
See also: MOV
XCHD Exchange Digit
Syntax XCHD A,register
Instructions OpCode Bytes Cycles Flags
XCHD A,@R0 0xD6 1 1 None
XCHD A,@R1 0xD7 1 1 None
XCHD exchanges bits 0−3 of the accumulator with bits 0−3 of the internal RAM
address pointed to indirectly by R0 or R1. Bits 4−7 of each register are unaffected.
See also: DA