Datasheet

Direction
0: Input
1: Output
P2SEL.7
P2DIR.7
P2IN.7
P2IRQ.7
D
EN
Module X IN
Module X OUT
P2OUT.7
Interrupt
Edge Select
Q
EN
Set
P2SEL.7
P2IES.7
P2IFG.7
P2IE.7
DVSS
DVCC
Pad Logic
1
1
0
1
0
1
0
Bus
Keeper
EN
P2.7/XT2OUT
1
0
XT2CLK
P2.6/XT2IN
XT2 off
BCSCTL3.XT2Sx = 11
From P2.6/XT2IN
P2SEL.6
P2REN.7
MSP430AFE2x3
MSP430AFE2x2
MSP430AFE2x1
SLAS701A – NOVEMBER 2010– REVISED MARCH 2011 www.ti.com
Port P2 Pin Schematic: P2.7, Input/Output With Schmitt Trigger
Table 24. Port P2 (P2.7) Pin Functions
CONTROL BITS / SIGNALS
PIN NAME (P2.x) x FUNCTION
P2DIR.7 P2SEL.7
P2.7 (I/O) I: 0, O: 1 0
P2.7/XT2OUT 7
XT2OUT (default) 0 1
40 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated