Datasheet

MSP430AFE2x3
MSP430AFE2x2
MSP430AFE2x1
SLAS701A –NOVEMBER 2010– REVISED MARCH 2011 www.ti.com
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x2xx Family User's Guide (SLAU144).
Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for an internal digitally controlled
oscillator (DCO), a high-frequency crystal oscillator, and an internal very-low-power low-frequency oscillator
(VLO). The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 µs. The basic
clock module provides the following clock signals:
• Auxiliary clock (ACLK), sourced from the VLO
• Main clock (MCLK), the system clock used by the CPU
• Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules
Table 13. DCO Calibration Data
(Provided From Factory in Flash Information Memory Segment A)
DCO FREQUENCY CALIBRATION REGISTER SIZE ADDRESS
CALBC1_8MHZ byte 010FDh
8 MHz
CALDCO_8MHZ byte 010FCh
CALBC1_12MHZ byte 010FBh
12 MHz
CALDCO_12MHZ byte 010FAh
Brownout, Supply Voltage Supervisor
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off. The supply voltage supervisor (SVS) circuitry detects if supply voltage drops below a user-selectable
level and supports both supply voltage supervision (the device is automatically reset) and supply voltage
monitoring (SVM) (the device is not automatically reset).
The CPU begins code execution after the brownout circuit releases the device reset. However, V
CC
may not have
ramped to V
CC(min)
at that time. The user must ensure that the default DCO settings are not changed until V
CC
reaches V
CC(min)
. If desired, the SVS circuit can be used to determine when V
CC
reaches V
CC(min)
.
Digital I/O
There are two I/O ports implemented: 8-bit port P1 and 3-bit port P2.
• All individual I/O bits are independently programmable.
• Any combination of input, output, and interrupt condition is possible.
• Edge-selectable interrupt input capability for all eight bits of port P1 and three bits of port P2.
• Read/write access to port-control registers is supported by all instructions.
• Each I/O has an individually programmable pullup/pulldown resistor.
Because there are only three I/O pins implemented from port P2, bits [5:1] of all port P2 registers read as 0, and
write data is ignored.
Watchdog Timer (WDT+)
The primary function of the WDT+ module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed
in an application, the module can be disabled or configured as an interval timer and can generate interrupts at
selected time intervals.
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