Datasheet

Direction
0: Input
1: Output
P1IN.4
P1IRQ.4
D
EN
USART0
data in
Interrupt
Edge Select
Q
EN
Set
P1SEL.4
P1IES.4
P1IFG.4
P1IE.4
DVSS
DVCC
P1REN.4
Pad Logic
11
0
P1.4/URXD0/SD2DO
Bus
Keeper
EN
P1SEL.4
P1DIR.4
P1OUT.4
1
0
1
0
0
1
P1SEL2.4
USART0
direction
SD24_A data
MSP430AFE2x3
MSP430AFE2x2
MSP430AFE2x1
SLAS701A – NOVEMBER 2010– REVISED MARCH 2011 www.ti.com
Port P1 Pin Schematic: P1.4 Input/Output With Schmitt Trigger
Table 20. Port P1 (P1.4) Pin Functions
CONTROL BITS / SIGNALS
(1)
PIN NAME (P1.x) x FUNCTION
P1DIR.x P1SEL.x P1SEL2.x
P1.4 (I/O) I: 0, O: 1 0 X
P1.4/URXD0/SD2DO 4 URXD0 X 1 0
SD2DO 1 1 1
(1) X = don't care
36 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated