Datasheet

MSP430BT5190

www.ti.com

SLAS703A –APRIL 2010–REVISED AUGUST 2013

Bootstrap Loader (BSL)

The BSL enables users to program the flash memory or RAM using a UART serial interface. Access to the

device memory via the BSL is protected by an user-defined password. Usage of the BSL requires four pins as

shown in Table 4. BSL entry requires a specific entry sequence on the RST/NMI/SBWTDIO and TEST/SBWTCK

pins. For further details on interfacing to development tools and device programmers, see the MSP430(tm)

Hardware Tools User's Guide (SLAU278). For a complete description of the features of the BSL and its

implementation, see the MSP430 Programming Via the Bootstrap Loader User's Guide (SLAU319).

Table 4. BSL Pin Requirements and Functions

DEVICE SIGNAL BSL FUNCTION

RST/NMI/SBWTDIO Entry sequence signal

TEST/SBWTCK Entry sequence signal

P1.1 Data transmit

P1.2 Data receive

VCC Power supply

VSS Ground supply

JTAG Operation

JTAG Standard Interface

The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving

data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the

JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430

development tools and device programmers. The JTAG pin requirements are shown in Table 5. For further

details on interfacing to development tools and device programmers, see the MSP430(tm) Hardware Tools

User's Guide (SLAU278). For a complete description of the features of the JTAG interface and its

implementation, see MSP430 Programming Via the JTAG Interface (SLAU320).

Table 5. JTAG Pin Requirements and Functions

DEVICE SIGNAL DIRECTION FUNCTION

PJ.3/TCK IN JTAG clock input

PJ.2/TMS IN JTAG state control

PJ.1/TDI/TCLK IN JTAG data input; TCLK input

PJ.0/TDO OUT JTAG data output

TEST/SBWTCK IN Enable JTAG pins

RST/NMI/SBWTDIO IN External reset

VCC Power supply

VSS Ground supply

Product Folder Links: MSP430BT5190