Datasheet

MSP430BT5190
SLAS703A APRIL 2010REVISED AUGUST 2013
www.ti.com
Table 41. USCI_A3 Registers (Base Address: 0680h)
REGISTER DESCRIPTION REGISTER OFFSET
USCI control 1 UCA3CTL1 00h
USCI control 0 UCA3CTL0 01h
USCI baud rate 0 UCA3BR0 06h
USCI baud rate 1 UCA3BR1 07h
USCI modulation control UCA3MCTL 08h
USCI status UCA3STAT 0Ah
USCI receive buffer UCA3RXBUF 0Ch
USCI transmit buffer UCA3TXBUF 0Eh
USCI LIN control UCA3ABCTL 10h
USCI IrDA transmit control UCA3IRTCTL 12h
USCI IrDA receive control UCA3IRRCTL 13h
USCI interrupt enable UCA3IE 1Ch
USCI interrupt flags UCA3IFG 1Dh
USCI interrupt vector word UCA3IV 1Eh
Table 42. USCI_B3 Registers (Base Address: 06A0h)
REGISTER DESCRIPTION REGISTER OFFSET
USCI synchronous control 1 UCB3CTL1 00h
USCI synchronous control 0 UCB3CTL0 01h
USCI synchronous bit rate 0 UCB3BR0 06h
USCI synchronous bit rate 1 UCB3BR1 07h
USCI synchronous status UCB3STAT 0Ah
USCI synchronous receive buffer UCB3RXBUF 0Ch
USCI synchronous transmit buffer UCB3TXBUF 0Eh
USCI I2C own address UCB3I2COA 10h
USCI I2C slave address UCB3I2CSA 12h
USCI interrupt enable UCB3IE 1Ch
USCI interrupt flags UCB3IFG 1Dh
USCI interrupt vector word UCB3IV 1Eh
38 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: MSP430BT5190