Datasheet

MSP430BT5190
www.ti.com
SLAS703A APRIL 2010REVISED AUGUST 2013
12-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
AV
CC
and DV
CC
are connected together,
Analog supply voltage,
AV
CC
AV
SS
and DV
SS
are connected together, 2.2 3.6 V
Full performance
V
(AVSS)
= V
(DVSS)
= 0 V
V
(Ax)
Analog input voltage range
(2)
All ADC12 analog input pins Ax 0 AV
CC
V
2.2 V 125 155
Operating supply current into f
ADC12CLK
= 5.0 MHz, ADC12ON = 1,
I
ADC12_A
µA
AVCC terminal
(3)
REFON = 0, SHT0 = 0, SHT1 = 0, ADC12DIV = 0
3 V 150 220
C
I
Input capacitance Only one terminal Ax can be selected at one time 2.2 V 20 25 pF
R
I
Input MUX ON resistance 0 V V
Ax
AV
CC
10 200 1900
(1) The leakage current is specified by the digital I/O input leakage.
(2) The analog input voltage range must be within the selected reference voltage range V
R+
to V
R–
for valid conversion results. If the
reference voltage is supplied by an external source or if the internal reference voltage is used and REFOUT = 1, then decoupling
capacitors are required. See REF, External Reference and REF, Built-In Reference.
(3) The internal reference supply current is not included in current consumption parameter I
ADC12_A
.
12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
For specified performance of ADC12 linearity
f
ADC12CLK
2.2 V, 3 V 0.45 4.8 5.4 MHz
parameters
Internal ADC12
f
ADC12OSC
ADC12DIV = 0, f
ADC12CLK
= f
ADC12OSC
2.2 V, 3 V 4.2 4.8 5.4 MHz
oscillator
(1)
REFON = 0, Internal oscillator,
2.2 V, 3 V 2.4 3.1
f
ADC12OSC
= 4.2 MHz to 5.4 MHz
t
CONVERT
Conversion time µs
External f
ADC12CLK
from ACLK, MCLK or SMCLK,
(2)
ADC12SSEL 0
R
S
= 400 , R
I
= 1000 , C
I
= 20 pF,
t
Sample
Sampling time 2.2 V, 3 V 1000 ns
τ = [R
S
+ R
I
] × C
I
(3)
(1) The ADC12OSC is sourced directly from MODOSC inside the UCS.
(2) 13 × ADC12DIV × 1/f
ADC12CLK
(3) Approximately ten Tau (τ) are needed to get an error of less than ±0.5 LSB:
t
Sample
= ln(2
n+1
) x (R
S
+ R
I
) × C
I
+ 800 ns, where n = ADC resolution = 12, R
S
= external source resistance
12-Bit ADC, Linearity Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
1.4 V (V
eREF+
V
REF–
/V
eREF–
)min 1.6 V ±2
Integral
E
I
2.2 V, 3 V LSB
linearity error (INL)
1.6 V < (V
eREF+
V
REF–
/V
eREF–
)min V
AVCC
±1.7
Differential (V
eREF+
V
REF–
/V
eREF–
)min (V
eREF+
V
REF–
/V
eREF–
),
E
D
2.2 V, 3 V ±1.0 LSB
linearity error (DNL) C
VREF+
= 20 pF
(V
eREF+
V
REF–
/V
eREF–
)min (V
eREF+
V
REF–
/V
eREF–
),
E
O
Offset error 2.2 V, 3 V ±1.0 ±2.0 LSB
Internal impedance of source R
S
< 100 , C
VREF+
= 20 pF
(V
eREF+
V
REF–
/V
eREF–
)min (V
eREF+
V
REF–
/V
eREF–
),
E
G
Gain error 2.2 V, 3 V ±1.0 ±2.0 LSB
C
VREF+
= 20 pF
Total unadjusted (V
eREF+
V
REF–
/V
eREF–
)min (V
eREF+
V
REF–
/V
eREF–
),
E
T
2.2 V, 3 V ±1.4 ±3.5 LSB
error C
VREF+
= 20 pF
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