Datasheet

MSP430BT5190
SLAS703A APRIL 2010REVISED AUGUST 2013
www.ti.com
REF, Built-In Reference (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
Capacitance at VREF+ and
C
VREF+/-
REFON = REFOUT = 1
(5)
20 100 pF
VREF- terminals
I
VREF+
= 0 A,
Temperature coefficient of
TC
REF+
REFVSEL = (0, 1, 2}, REFON = 1, 30 50 ppm/°C
built-in reference
(6)
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
Power supply rejection ratio T
A
= 25°C,
PSRR_DC 120 300 µV/V
(DC) REFVSEL = (0, 1, 2}, REFON = 1,
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
T
A
= 25°C,
Power supply rejection ratio
PSRR_AC f = 1 kHz, ΔVpp = 100 mV, 6.4 mV/V
(AC)
REFVSEL = (0, 1, 2}, REFON = 1,
REFOUT = 0 or 1
AV
CC
= AV
CC (min)
- AV
CC(max)
,
REFVSEL = (0, 1, 2}, REFOUT = 0, 75
REFON = 0 1
Settling time of reference
t
SETTLE
µs
AV
CC
= AV
CC (min)
- AV
CC(max)
,
voltage
(7)
C
VREF
= C
VREF
(max),
75
REFVSEL = (0, 1, 2}, REFOUT = 1,
REFON = 0 1
(5) Two decoupling capacitors, 10 µF and 100 nF, should be connected to VREF to decouple the dynamic current required for an external
reference source if it is used for the ADC12_A. See also the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208).
(6) Calculated using the box method: (MAX(-40 to 85°C) MIN(-40 to 85°C)) / MIN(-40 to 85°C)/(85°C (–40°C)).
(7) The condition is that the error in a conversion started after t
REFON
is less than ± 0.5 LSB. The settling time depends on the external
capacitive load when REFOUT = 1.
Flash Memory
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST
PARAMETER MIN TYP MAX UNIT
CONDITIONS
DV
CC(PGM/ERASE)
Program and erase supply voltage 1.8 3.6 V
I
PGM
Average supply current from DVCC during program 3 5 mA
I
ERASE
Average supply current from DVCC during erase 6 11 mA
Average supply current from DVCC during mass erase or bank
I
MERASE
, I
BANK
6 11 mA
erase
t
CPT
Cumulative program time See
(1)
16 ms
Program and erase endurance 10
4
10
5
cycles
t
Retention
Data retention duration T
J
= 25°C 100 years
t
Word
Word or byte program time See
(2)
64 85 µs
t
Block, 0
Block program time for first byte or word See
(2)
49 65 µs
Block program time for each additional byte or word, except for last
t
Block, 1–(N–1)
See
(2)
37 49 µs
byte or word
t
Block, N
Block program time for last byte or word See
(2)
55 73 µs
Erase time for segment, mass erase, and bank erase when
t
Erase
See
(2)
23 32 ms
available
MCLK frequency in marginal read mode
f
MCLK,MGR
0 1 MHz
(FCTL4.MGR0 = 1 or FCTL4. MGR1 = 1)
(1) The cumulative program time must not be exceeded when writing to a 128-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
(2) These values are hardwired into the flash controller's state machine.
66 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: MSP430BT5190