Datasheet

P3.0/UB0STE/UCA0CLK
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/USC0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3.6/UCB1STE/UCA1CLK
P3.7/UCB1SIMO/UCB1SDA
Direction
0: Input
1: Output
P3SEL.x
1
0
P3DIR.x
P3IN.x
EN
Module X IN
1
0
Module X OUT
P3OUT.x
1
0
DV
SS
DV
CC
P3REN.x
Pad Logic
1
P3DS.x
0: Low drive
1: High drive
D
MSP430BT5190
SLAS703A –APRIL 2010–REVISED AUGUST 2013 www.ti.com
Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger
Table 46. Port P3 (P3.0 to P3.7) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P3.x) x FUNCTION
P3DIR.x P3SEL.x
P3.0/UCB0STE/UCA0CLK 0 P3.0 (I/O) I: 0; O: 1 0
UCB0STE/UCA0CLK
(2) (3)
X 1
P3.1/UCB0SIMO/UCB0SDA 1 P3.1 (I/O) I: 0; O: 1 0
UCB0SIMO/UCB0SDA
(2) (4)
X 1
P3.2/UCB0SOMI/UCB0SCL 2 P3.2 (I/O) I: 0; O: 1 0
UCB0SOMI/UCB0SCL
(2) (4)
X 1
P3.3/UCB0CLK/UCA0STE 3 P3.3 (I/O) I: 0; O: 1 0
UCB0CLK/UCA0STE
(2)
X 1
P3.4/UCA0TXD/UCA0SIMO 4 P3.4 (I/O) I: 0; O: 1 0
UCA0TXD/UCA0SIMO
(2)
X 1
P3.5/UCA0RXD/UCA0SOMI 5 P3.5 (I/O) I: 0; O: 1 0
UCA0RXD/UCA0SOMI
(2)
X 1
P3.6/UCB1STE/UCA1CLK 6 P3.6 (I/O) I: 0; O: 1 0
UCB1STE/UCA1CLK
(2) (5)
X 1
P3.7/UCB1SIMO/UCB1SDA 7 P3.7 (I/O) I: 0; O: 1 0
UCB1SIMO/UCB1SDA
(2) (4)
X 1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) UCA0CLK function takes precedence over UCB0STE function. If the pin is required as UCA0CLK input or output, USCI B0 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
(4) If the I2C functionality is selected, the output drives only the logical 0 to V
SS
level.
(5) UCA1CLK function takes precedence over UCB1STE function. If the pin is required as UCA1CLK input or output, USCI B1 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
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