Datasheet

P5.4/UCB1SOMI/UCB1SCL
P5.5/UCB1CLK/UCA1STE
P5.6/UCA1TXD/UCA1SIMO
P5.7/UCA1RXD/UCA1SOMI
Direction
0: Input
1: Output
P5SEL.x
1
0
P5DIR.x
P5IN.x
EN
Module X IN
1
0
Module X OUT
P5OUT.x
1
0
DV
SS
DV
CC
P5REN.x
Pad Logic
1
P5DS.x
0: Low drive
1: High drive
D
MSP430BT5190
www.ti.com SLAS703A –APRIL 2010–REVISED AUGUST 2013
Port P5, P5.4 to P5.7, Input/Output With Schmitt Trigger
Table 50. Port P5 (P5.4 to P5.7) Pin Functions
CONTROL BITS/SIGNALS
(1)
PIN NAME (P5.x) x FUNCTION
P5DIR.x P5SEL.x
P5.4/UCB1SOMI/UCB1SCL 4 P5.4 (I/O) I: 0; O: 1 0
UCB1SOMI/UCB1SCL
(2) (3)
X 1
P5.5/UCB1CLK/UCA1STE 5 P5.5 (I/O) I: 0; O: 1 0
UCB1CLK/UCA1STE
(2)(4)
X 1
P5.6/UCA1TXD/UCA1SIMO 6 P5.6 (I/O) I: 0; O: 1 0
UCA1TXD/UCA1SIMO
(2)
X 1
P5.7/UCA1RXD/UCA1SOMI 7 P5.7 (I/O) I: 0; O: 1 0
UCA1RXD/UCA1SOMI
(2)
X 1
(1) X = Don't care
(2) The pin direction is controlled by the USCI module.
(3) If the I2C functionality is selected, the output drives only the logical 0 to V
SS
level.
(4) UCB1CLK function takes precedence over UCA1STE function. If the pin is required as UCB1CLK input or output, USCI A1 is forced to
3-wire SPI mode if 4-wire SPI mode is selected.
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