Datasheet

MSP430BT5190
www.ti.com SLAS703A –APRIL 2010–REVISED AUGUST 2013
Table 38. USCI_B1 Registers (Base Address: 0620h)
REGISTER DESCRIPTION REGISTER OFFSET
USCI synchronous control 1 UCB1CTL1 00h
USCI synchronous control 0 UCB1CTL0 01h
USCI synchronous bit rate 0 UCB1BR0 06h
USCI synchronous bit rate 1 UCB1BR1 07h
USCI synchronous status UCB1STAT 0Ah
USCI synchronous receive buffer UCB1RXBUF 0Ch
USCI synchronous transmit buffer UCB1TXBUF 0Eh
USCI I2C own address UCB1I2COA 10h
USCI I2C slave address UCB1I2CSA 12h
USCI interrupt enable UCB1IE 1Ch
USCI interrupt flags UCB1IFG 1Dh
USCI interrupt vector word UCB1IV 1Eh
Table 39. USCI_A2 Registers (Base Address: 0640h)
REGISTER DESCRIPTION REGISTER OFFSET
USCI control 1 UCA2CTL1 00h
USCI control 0 UCA2CTL0 01h
USCI baud rate 0 UCA2BR0 06h
USCI baud rate 1 UCA2BR1 07h
USCI modulation control UCA2MCTL 08h
USCI status UCA2STAT 0Ah
USCI receive buffer UCA2RXBUF 0Ch
USCI transmit buffer UCA2TXBUF 0Eh
USCI LIN control UCA2ABCTL 10h
USCI IrDA transmit control UCA2IRTCTL 12h
USCI IrDA receive control UCA2IRRCTL 13h
USCI interrupt enable UCA2IE 1Ch
USCI interrupt flags UCA2IFG 1Dh
USCI interrupt vector word UCA2IV 1Eh
Table 40. USCI_B2 Registers (Base Address: 0660h)
REGISTER DESCRIPTION REGISTER OFFSET
USCI synchronous control 1 UCB2CTL1 00h
USCI synchronous control 0 UCB2CTL0 01h
USCI synchronous bit rate 0 UCB2BR0 06h
USCI synchronous bit rate 1 UCB2BR1 07h
USCI synchronous status UCB2STAT 0Ah
USCI synchronous receive buffer UCB2RXBUF 0Ch
USCI synchronous transmit buffer UCB2TXBUF 0Eh
USCI I2C own address UCB2I2COA 10h
USCI I2C slave address UCB2I2CSA 12h
USCI interrupt enable UCB2IE 1Ch
USCI interrupt flags UCB2IFG 1Dh
USCI interrupt vector word UCB2IV 1Eh
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