MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 D Low Supply Voltage Range 1.8 V to 3.6 V D Ultralow-Power Consumption D D D Two Configurable Operational Amplifiers (MSP430x22x4 Only) D Brownout Detector D Serial Onboard Programming, − Active Mode: 270 μA at 1 MHz, 2.2 V − Standby Mode: 0.7 μA − Off Mode (RAM Retention): 0.1 μA Ultrafast Wake-Up From Standby Mode in Less Than 1 μs 16-Bit RISC Architecture, 62.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 AVAILABLE OPTIONS PACKAGED DEVICES PLASTIC 38-PIN TSSOP (DA) PLASTIC 40-PIN QFN (RHA) −40°C to 85°C MSP430F2232IDA MSP430F2252IDA MSP430F2272IDA MSP430F2234IDA MSP430F2254IDA MSP430F2274IDA MSP430F2232IRHA MSP430F2252IRHA MSP430F2272IRHA MSP430F2234IRHA MSP430F2254IRHA MSP430F2274IRHA −40°C to 105°C MSP430F2232TDA † MSP430F2252TDA † MSP430F2272TDA † MSP430F2234TDA MSP430F2254TDA MSP430F2274TDA MSP430F2232T
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 MSP430x22x2 device pinout, DA package TEST/SBWTCK 1 38 P1.7/TA 2/TDO /TDI DVCC 2 37 P1.6/TA 1/TDI P2.5/Rosc 3 36 P1.5/TA 0/TMS DVSS 4 35 P1.4/SMCLK /TCK XOUT /P2.7 5 34 P1.3/TA 2 XIN /P2.6 6 33 P1.2/TA 1 7 32 P1.1/TA 0 P2.0/ACLK /A0 8 31 P1.0/TACLK /ADC 10 CLK P2.1/TAINCLK /SMCLK /A1 9 30 P2.4/TA 2/A4/VREF+/ VeREF + RST /NMI /SBWTDIO P2.2/TA 0/A2 10 29 P2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 39 38 37 36 35 34 33 32 P1.2/TA1 P1.3/TA2 P1.4/SMCLK/TCK P1.5/TA0/TMS P1.6/TA1/TDI/TCLK TEST/SBWTCK P1.7/TA2/TDO/TDI DVCC DVCC P2.5/Rosc MSP430x22x2 device pinout, RHA package DVSS 1 30 P1.1/TA 0 XOUT /P2.7 2 29 P1.0/TACLK /ADC 10 CLK XIN /P2.6 3 28 P2.4/TA 2/A4/VREF+/VeREF + DVSS 4 27 P2.3/TA 1/A3/VREF−/VeREF − RST /NMI /SBWTDIO 5 26 P3.7/A7 P2.0/ACLK /A0 6 25 P3.6/A6 P2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 39 38 37 36 35 34 33 32 P1.2/TA1 P1.3/TA2 P1.4/SMCLK/TCK P1.5/TA0/TMS P1.6/TA1/TDI/TCLK P1.7/TA2/TDO/TDI TEST/SBWTCK DVCC DVCC P2.5/Rosc MSP430x22x4 device pinout, RHA package DVSS 1 30 P1.1/TA 0 XOUT /P2.7 2 29 P1.0/TACLK /ADC 10 CLK XIN /P2.6 3 28 P2.4/TA 2/A4/VREF+/VeREF+/OA1I0 DVSS 4 27 P2.3/TA 1/A3/VREF−/VeREF−/OA 1I1/OA1O RST/NMI/SBWTDIO 5 26 P3.7/A7/OA 1I2 P2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 MSP430x22x2 functional block diagram VCC VSS P1.x/P2.x 2x8 P3.x/P4.x 2x8 XOUT XIN Basic Clock System+ ACLK SMCLK MCLK Flash RAM 32kB 16kB 8kB 1kB 512B 512B ADC10 10−Bit Ports P1/P2 Ports P3/P4 2x8 I/O 2x8 I/O Interrupt pull−up/down capability, pull−up/down resistors resistors 12 Channels, Autoscan, DTC MAB 16MHz CPU incl.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Terminal Functions, MSP430x22x2 TERMINAL DA RHA NO. NO. P1.0/TACLK/ ADC10CLK 31 29 I/O General-purpose digital I/O pin Timer_A, clock signal TACLK input ADC10, conversion clock P1.1/TA0 32 30 I/O General-purpose digital I/O pin Timer_A, capture: CCI0A input, compare: OUT0 output/BSL transmit P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Terminal Functions, MSP430x22x2 (Continued) TERMINAL DA RHA NO. NO. P3.5/ UCA0RXD/UCA0SOMI 26 24 I/O General-purpose digital I/O pin USCI_A0 receive data input in UART mode, slave out/master in in SPI mode P3.6/A6 27 25 I/O General-purpose digital I/O pin ADC10 analog input A6 P3.7/A7 28 26 I/O General-purpose digital I/O pin ADC10 analog input A7 P4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Terminal Functions, MSP430x22x4 TERMINAL DA RHA NO. NO. P1.0/TACLK/ ADC10CLK 31 29 I/O General-purpose digital I/O pin Timer_A, clock signal TACLK input ADC10, conversion clock P1.1/TA0 32 30 I/O General-purpose digital I/O pin Timer_A, capture: CCI0A input, compare: OUT0 output/BSL transmit P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Terminal Functions, MSP430x22x4 (Continued) TERMINAL DA RHA NO. NO. P3.5/ UCA0RXD/UCA0SOMI 26 24 I/O General-purpose digital I/O pin USCI_A0 receive data input in UART mode, slave out/master in in SPI mode P3.6/A6/OA0I2 27 25 I/O General-purpose digital I/O pin ADC10 analog input A6 / OA0 analog input I2 P3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 short-form description CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 operating modes The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh to 0FFC0h. The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence. If the reset vector (located at address 0FFFEh) contains 0FFFFh (e.g., flash is not programmed) the CPU goes into LPM4 immediately after power up.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 special function registers Most interrupt and module enable bits are collected into the lowest address space. Special function register bits not allocated to a functional purpose are not physically present in the device. Simple software access is provided with this arrangement.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 interrupt flag register 1 and 2 Address 7 6 5 02h 4 3 2 1 0 NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw−0 rw−(0) rw−(1) rw−1 rw−(0) WDTIFG Set on Watchdog Timer overflow (in watchdog mode) or security key violation. Reset on VCC power up or a reset condition at RST/NMI pin in reset mode. OFIFG Flag set on oscillator fault RSTIFG External reset interrupt flag.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 memory organization MSP430F223x MSP430F225x MSP430F227x Memory Main: interrupt vector Main: code memory Size Flash Flash 8KB Flash 0FFFFh−0FFC0h 0FFFFh−0E000h 16KB Flash 0FFFFh−0FFC0h 0FFFFh−0C000h 32KB Flash 0FFFFh−0FFC0h 0FFFFh−08000h Information memory Size Flash 256 Byte 010FFh−01000h 256 Byte 010FFh−01000h 256 Byte 010FFh−01000h Boot memory Size ROM 1KB 0FFFh−0C00h 1KB 0FFFh−0C00h 1KB 0FFFh−
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 peripherals Peripherals are connected to the CPU through data, address, and control busses and can be handled using all instructions. For complete module descriptions, refer to the MSP430x2xx Family User’s Guide.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 timer_A3 Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Timer_A3 Signal Connections Input Pin Number DA RHA 31 - P1.0 29 - P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 timer_B3 Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Timer_B3 Signal Connections Input Pin Number DA RHA 24 - P4.7 22 - P4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 ADC10 The ADC10 module supports fast, 10-bit analog-to-digital conversions. The module implements a 10-bit SAR core, sample select control, reference generator and data transfer controller, or DTC, for automatic conversion result handling allowing ADC samples to be converted and stored without any CPU intervention.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 peripheral file map PERIPHERALS WITH WORD ACCESS ADC10 ADC data transfer start address ADC memory ADC control register 1 ADC control register 0 ADC analog enable 0 ADC analog enable 1 ADC data transfer control register 1 ADC data transfer control register 0 ADC10SA ADC10MEM ADC10CTL1 ADC10CTL0 ADC10AE0 ADC10AE1 ADC10DTC1 ADC10DTC0 1BCh 1B4h 1B2h 1B0h 04Ah 04Bh 049h 048h Timer_B Capture/compare Capture/compar
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 PERIPHERALS WITH BYTE ACCESS (continued) 22 Basic Clock System+ Basic clock system control 3 Basic clock system control 2 Basic clock system control 1 DCO clock frequency control BCSCTL3 BCSCTL2 BCSCTL1 DCOCTL 053h 058h 057h 056h Port P4 Port P4 resistor enable Port P4 selection Port P4 direction Port P4 output Port P4 input P4REN P4SEL P4DIR P4OUT P4IN 011h 01Fh 01Eh 01Dh 01Ch Port P3 Port P3 resistor
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 absolute maximum ratings (see Note 1) Voltage applied at VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 4.1 V Voltage applied to any pin (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC+0.3 V Diode current at any device terminal . . . . . . . . . . . . . . . . . . . . . . .
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) active mode supply current (into DVCC + AVCC) excluding external current (see Notes 1 and 2) PARAMETER IAM, 1MHz IAM, 1MHz IAM, 4kHz IAM,100kHz Active mode (AM) current (1 MHz) Active mode (AM) current (1 MHz) Active mode (AM) current (4 kHz) Active mode (AM) current (100 kHz)
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − active mode supply current (into DVCC + AVCC) 8.0 5.0 fDCO = 16 MHz TA = 85 °C Active Mode Current − mA Active Mode Current − mA 7.0 6.0 fDCO = 12 MHz 5.0 4.0 fDCO = 8 MHz 3.0 2.0 4.0 TA = 25 °C 3.0 VCC = 3 V TA = 85 °C 2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) low power mode supply currents (into DVCC + AVCC) excluding external current (see Notes 1 and 2) PARAMETER ILPM0, 1MHz ILPM0, 100kHz ILPM2 ILPM3,LFXT1 Low-power mode 0 (LPM0) current current, see Note 3 TEST CONDITIONS TA fMCLK = 0 MHz, fSMCLK = fDCO = 1 MHz, fACLK =
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs − Ports P1, P2, P3, P4, and RST/NMI PARAMETER VIT+ VIT− TEST CONDITIONS Positive-going Positive going input threshold voltage Negative-going Negative going input threshold voltage Vhys Input voltage hysteresis (VIT+ − VIT−) RPull Pullup/pulldo
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) outputs − Ports P1, P2, P3 and P4 PARAMETER VOH VOL High level output voltage High-level Low level output voltage Low-level VCC MIN I(OHmax) = −1.5 mA (see Note 1) TEST CONDITIONS 2.2 V VCC−0.25 TYP MAX VCC I(OHmax) = −6 mA (see Note 2) 2.2 V VCC−0.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − outputs TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 50.0 I OL − Typical Low-Level Output Current − mA I OL − Typical Low-Level Output Current − mA 25.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) POR/brownout reset (BOR) (see Notes 1 and 2) PARAMETER TEST CONDITIONS VCC(start) See Figure 8 dVCC/dt ≤ 3 V/s V(B_IT−) See Figure 8 through Figure 10 dVCC/dt ≤ 3 V/s Vhys(B_IT−) See Figure 8 dVCC/dt ≤ 3 V/s td(BOR) See Figure 8 t(reset) Pulse length needed at
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − POR/brownout reset (BOR) VCC 3V 2 VCC(drop) − V VCC = 3 V Typical Conditions t pw 1.5 1 VCC(drop) 0.5 0 0.001 1 1000 1 ns tpw − Pulse Width − μs 1 ns tpw − Pulse Width − μs Figure 9.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) main DCO characteristics D All ranges selected by RSELx overlap with RSELx + 1: RSELx = 0 overlaps RSELx = 1, ... RSELx = 14 overlaps RSELx = 15. D DCO control bits DCOx have a step size as defined by parameter SDCO.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) calibrated DCO frequencies − tolerance at calibration PARAMETER TEST CONDITIONS Frequency tolerance at calibration TA VCC MIN TYP MAX UNIT 25°C 3V −1 ±0.2 +1 25°C 3V 0.990 1 1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) calibrated DCO frequencies − tolerance over supply voltage VCC TA VCC 1-MHz tolerance over VCC 25°C 1.8 V − 3.6 V 8-MHz tolerance over VCC 25°C 1.8 V − 3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 typical characteristics − calibrated 1-MHz DCO frequency 1.03 1.02 VCC = 1.8 V Frequency − MHz 1.01 1.00 VCC = 2.2 V VCC = 3.0 V 0.99 VCC = 3.6 V 0.98 0.97 −50.0 −25.0 0.0 25.0 50.0 75.0 100.0 TA − Temperature − °C Figure 11. Calibrated 1-MHz Frequency vs Temperature 1.03 Frequency − MHz 1.02 TA = 105 °C 1.01 TA = 85 °C 1.00 TA = 25 °C 0.99 TA = −40 °C 0.98 0.97 1.5 2.0 2.5 3.0 3.5 4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) wake-up from lower power modes (LPM3/4) PARAMETER tDCO,LPM3/4 tCPU,LPM3/4 TEST CONDITIONS DCO clock wake-up wake up time from LPM3/4 (see Note 1) VCC MIN TYP MAX BCSCTL1= CALBC1_1MHZ, DCOCTL = CALDCO_1MHZ 2.2 V/3 V 2 BCSCTL1= CALBC1_8MHZ, DCOCTL = CALDCO_8MHZ 2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) DCO with external resistor ROSC (see Note 1) PARAMETER TEST CONDITIONS VCC fDCO,ROSC DCO output frequency with ROSC DCOR = 1, RSELx = 4, 4 DCOx = 3 3, MODx = 0 0, TA = 25°C Dt Temperature drift DV Drift with VCC MIN TYP MAX UNIT 2.2 V 1.8 3V 1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1, low frequency modes (see Note 4) PARAMETER TEST CONDITIONS VCC fLFXT1,LF LFXT1 oscillator crystal frequency, LF mode 0, 1 XTS = 0, LFXT1Sx = 0 or 1 1.8 V − 3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1, high frequency modes (see Note 5) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fLFXT1,HF0 LFXT1 oscillator crystal frequency, HF mode 0 XTS = 1, LFXT1Sx = 0 1.8 V − 3.6 V 0.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) typical characteristics − LFXT1 oscillator in HF mode (XTS = 1) Oscillation Allowance − Ohms 100000.00 10000.00 1000.00 LFXT1Sx = 3 100.00 LFXT1Sx = 2 LFXT1Sx = 1 10.00 0.10 1.00 10.00 100.00 Crystal Frequency − MHz Figure 18.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Timer_A PARAMETER fTA Timer A clock frequency Timer_A tTA,cap Timer_A, capture timing TEST CONDITIONS Internal: SMCLK, ACLK, External: TACLK TACLK, INCLK INCLK, Duty cycle = 50% ±10% TA0, TA1, TA2 VCC MIN TYP MAX 2.2 V 10 3V 16 UNIT MHz 2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (UART Mode) PARAMETER fUSCI USCI input clock frequency fBITCLK BITCLK clock frequency (equals baud rate in MBaud) tτ UART receive deglitch time (see Note 1) TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty cycle = 50% ± 10% 2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tVALID,MO SIMO Figure 20. SPI Master Mode, CKPH = 0 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tVALID,MO SIMO Figure 21.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL=0 UCLK CKPL=1 tLO/HI tLO/HI tSU,SI tHD,SI SIMO tSTE,ACC tVALID,SO tSTE,DIS SOMI Figure 22.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) USCI (I2C Mode) (see Figure 24) PARAMETER fUSCI USCI input clock frequency fSCL SCL clock frequency TEST CONDITIONS VCC MIN TYP Internal: SMCLK, ACLK External: UCLK Duty cycle = 50% ± 10% 2.2 V/3 V 0 fSCL ≤ 100 kHz 2.2 V/3 V 4.0 fSCL > 100 kHz 2.2 V/3 V 0.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, power supply and input range conditions (see Note 1) PARAMETER TEST CONDITIONS VCC Analog supply voltage range VSS = 0 V VAx Analog input voltage range (see Note 2) All Ax terminals.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, built-in voltage reference PARAMETER VCC,REF+ Positive P iti built-in b ilt i reference f analog supply voltage range VREF+ Positive built built-in in reference voltage ILD,VREF+ Maximum VREF+ load current TEST CONDITIONS MIN IVREF+ ≤ 1 mA, REF2_5V = 0
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, external reference (see Note 1) PARAMETER VeREF+ TEST CONDITIONS Positive external reference input voltage range (see Note 2) VCC VeREF− ≤ VeREF+ ≤ VCC − 0.15 V, SREF1 = 1, SREF0 = 1 (see Note 3) 1.4 3.0 0 1.2 V 1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, timing parameters PARAMETER fADC10CLK fADC10OSC tCONVERT TEST CONDITIONS For specified performance of ADC10 linearity parameters ADC10 input clock frequency ADC10 built-in oscillator frequency Conversion time VCC ADC10SR=0 MIN Turn on settling time of
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, temperature sensor and built-in VMID PARAMETER ISENSOR Temperature sensor supply current (see Note 1) VSensor REFON = 0, INCHx = 0Ah, TA = 25_C ADC10ON = 1, INCHx = 0Ah (see Note 2) TCSENSOR† VOffset,Sensor TEST CONDITIONS Sensor offset voltage Sensor outp
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) operational amplifier OA, supply specifications (MSP430x22x4 only) PARAMETER VCC TEST CONDITIONS VCC Supply voltage range MIN Medium Mode Supply current (see Note 1) 2.2 V/3 V Slow Mode PSRR MAX 180 290 110 190 50 80 2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) RO/P(OAx) Max RLoad ILoad AV CC OAx 2 CLoad O/P(OAx) Min 0.2V AV CC −0.2VAV V CC OUT Figure 25. OAx Output Resistance Tests operational amplifier OA, dynamic specifications (MSP430x22x4 only) PARAMETER SR TEST CONDITIONS Slew rate VCC MIN TYP Fast Mode 1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) operational amplifier OA feedback network, resistor network (see Note 1) (MSP430x22x4 only) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Rtotal Total resistance of resistor string 76 96 128 kΩ Runit Unit resistor of resistor string (see Note 2) 4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) operational amplifier OA feedback network, noninverting amplifier mode (OAFCx = 4) (MSP430x22x4 only) PARAMETER TEST CONDITIONS VCC Gain TYP MAX OAFBRx = 0 0.998 1.00 1.002 OAFBRx = 1 1.328 1.334 1.340 OAFBRx = 2 1.985 2.001 2.017 2.638 2.667 2.696 3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) Flash Memory PARAMETER VCC(PGM/ TEST CONDITIONS VCC Program and erase supply voltage MIN TYP 2.2 MAX UNIT 3.6 V 476 kHz 5 mA 7 mA 10 ms ERASE) fFTG Flash timing generator frequency IPGM Supply current from VCC during program 2.2 V/3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) JTAG and Spy-Bi-Wire Interface TEST CONDITIONS PARAMETER VCC MIN TYP MAX UNIT fSBW Spy-Bi-Wire input frequency 2.2 V / 3 V 0 20 MHz tSBW,Low Spy-Bi-Wire low clock pulse length 2.2 V / 3 V 0.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 APPLICATION INFORMATION Port P1 pin schematic: P1.0 to P1.3, input/output with Schmitt trigger Pad Logic P1REN.x P1DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P1OUT.x DVSS DVCC P1.0/TACLK/ADC10CLK P1.1/TA0 P1.2/TA1 P1.3/TA2 P1SEL.x P1IN.x EN Module X IN D P1IE.x P1IRQ.x EN Q Set P1IFG.x P1SEL.x P1IES.x Interrupt Edge Select Port P1 (P1.0 to P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P1 pin schematic: P1.4 to P1.6, input/output with Schmitt trigger and in-system access features Pad Logic P1REN.x P1DIR.x 0 P1OUT.x 0 1 0 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS DVCC P1.4/SMCLK/TCK P1.5/TA0/TMS P1.6/TA1/TDI Bus Keeper P1SEL.x EN P1IN.x EN Module X IN D P1IE.x EN P1IRQ.x Q Set P1IFG.x Interrupt Edge Select P1SEL.x P1IES.x To JTAG From JTAG Port P1 (P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P1 pin schematic: P1.7, input/output with Schmitt trigger and in-system access features Pad Logic P1REN.7 P1DIR.7 0 P1OUT.7 0 1 0 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS DVCC P1.7/TA2/TDO/TDI Bus Keeper P1SEL.7 EN P1IN.7 EN Module X IN D P1IE.7 EN P1IRQ.7 Q P1IFG.7 Set Interrupt Edge Select P1SEL.7 P1IES.7 To JTAG From JTAG From JTAG From JTAG (TDO) Port P1 (P1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.0, P2.2, input/output with Schmitt trigger Pad Logic To ADC10 INCHx = y ADC10AE0.y P2REN.x P2DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P2OUT.x DVSS DVCC P2.0/ACLK/A0/OA0I0 P2.2/TA0/A2/OA0I1 Bus Keeper P2SEL.x EN P2IN.x EN Module X IN D P2IE.x P2IRQ.x EN Q P2IFG.x P2SEL.x P2IES.x Set Interrupt Edge Select + OA0 − Port P2 (P2.0, P2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.1, input/output with Schmitt trigger Pad Logic To ADC10 INCHx = 1 ADC10AE0.1 P2REN.1 P2DIR.1 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P2OUT.1 DVSS DVCC P2.1/TAINCLK/SMCLK/ A1/OA0O Bus Keeper P2SEL.1 EN P2IN.1 EN Module X IN D P2IE.1 P2IRQ.1 EN Q P2IFG.1 Set + OA0 P2SEL.1 P2IES.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.3, input/output with Schmitt trigger SREF2 VSS 0 To ADC10 VR− Pad Logic 1 To ADC10 INCHx = 3 ADC10AE0.3 P2REN.3 P2DIR.3 0 P2OUT.3 0 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS P2.3/TA1/ A3/VREF−/VeREF−/ OA1I1/OA1O Bus Keeper P2SEL.3 EN P2IN.3 EN Module X IN D P2IE.3 P2IRQ.3 P2IFG.3 P2SEL.3 P2IES.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 (P2.1) pin functions CONTROL BITS / SIGNALS PIN NAME (P2 (P2.X) X) X Y P2.1/TAINCLK/SMCLK /A1/OA0O 1 1 FUNCTION P2.1† (I/O) Timer_A3.INCLK P2DIR.x P2SEL.x ADC10AE0.y I: 0; O: 1 0 0 0 1 0 SMCLK 1 1 0 A1/OA0O (see Note 3) X X 1 † Default after reset (PUC/POR) NOTES: 1. N/A: Not available or not applicable 2. X: Don’t care 3. Setting the ADC10AE0.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.4, input/output with Schmitt trigger Pad Logic To/from ADC10 positive reference To ADC10 INCHx = 4 ADC10AE0.4 P2REN.4 P2DIR.4 0 0 Module X OUT 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 P2OUT.4 DVSS P2.4/TA2/ A4/VREF+/VeREF+/ OA1I0 Bus Keeper P2SEL.4 EN P2IN.4 EN Module X IN D P2IE.4 P2IRQ.4 EN Q Set P2IFG.4 P2SEL.4 P2IES.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.5, input/output with Schmitt trigger and external ROSC for DCO Pad Logic To DCO DCOR P1REN.x P1DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P1OUT.x DVSS DVCC P2.5/ROSC Bus Keeper P1SEL.x EN P1IN.x EN Module X IN D P1IE.x P1IRQ.x EN Q P1IFG.x P1SEL.x P1IES.x Set Interrupt Edge Select Port P2 (P2.5) pin functions PIN NAME (P2 (P2.X) X) P2.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.6, input/output with Schmitt trigger and crystal oscillator input BCSCTL3.LFXT1Sx = 11 LFXT1 Oscillator P2.7/XOUT LFXT1 off 0 LFXT1CLK 1 Pad Logic P2SEL.7 P2REN.6 P2DIR.6 0 P2OUT.6 0 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS P2.6/XIN Bus Keeper P2SEL.6 EN P2IN.6 EN Module X IN D P2IE.6 P2IRQ.6 EN Q P2IFG.6 Set Interrupt Edge Select P2SEL.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P2 pin schematic: P2.7, input/output with Schmitt trigger and crystal oscillator output BCSCTL3.LFXT1Sx = 11 LFXT1 Oscillator LFXT1 off 0 LFXT1CLK From P2.6/XIN 1 P2.6/XIN Pad Logic P2SEL.6 P2REN.7 P2DIR.7 0 P2OUT.7 0 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS P2.7/XOUT Bus Keeper P2SEL.7 EN P2IN.7 EN Module X IN D P2IE.7 EN P2IRQ.7 Q P2IFG.7 P2SEL.7 P2IES.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P3 pin schematic: P3.0, input/output with Schmitt trigger Pad Logic To ADC10 INCHx = 5 ADC10AE0.5 P3REN.0 P3DIR.0 USCI Direction Control 0 P3OUT.0 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 P3.0/UC1STE/UC0CLK/A5 Bus Keeper P3SEL.0 EN P3IN.0 EN Module X IN D Port P3 (P3.0) pin functions CONTROL BITS / SIGNALS PIN NAME (P3 (P3.X) X) X Y P3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P3 pin schematic: P3.1 to P3.5, input/output with Schmitt trigger Pad Logic DVSS P3REN.x P3DIR.x USCI Direction Control 0 P3OUT.x 0 Module X OUT 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 Bus Keeper P3SEL.x EN P3IN.x P3.1/UC1SIMO/UC1SCL P3.2/UC1SOMI/UC1SDA P3.3/UC1CLK/UC0STE P3.4/UC0TXD/UC0SIMO P3.5/UC0RXD/UC0SOMI EN Module X IN D Port P3 (P3.1 to P3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P3 pin schematic: P3.6 to P3.7, input/output with Schmitt trigger Pad Logic To ADC10 INCHx = y ADC10AE0.y P3REN.x P3DIR.x 0 DVSS 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P3OUT.x DVSS DVCC P3.6/A6/OA0I2 P3.7/A7/OA1I2 Bus Keeper P3SEL.x EN P3IN.x EN Module X IN D + OA0/1 − Port P3 (P3.6, P3.7) pin functions PIN NAME (P3 (P3.X) X) P3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 pin schematic: P4.0 to P4.2, input/output with Schmitt trigger Timer_B Output Tristate Logic P4.6/TBOUTH/A15/OA1I3 P4SEL.6 P4DIR.6 ADC10AE1.7 Pad Logic P4REN.x P4DIR.x 0 0 Module X OUT 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 P4OUT.x DVSS Bus Keeper P4SEL.x P4.0/TB0 P4.1/TB1 P4.2/TB2 EN P4IN.x EN Module X IN D Port P4 (P4.0 to P4.2) pin functions PIN NAME (P4 (P4.X) X) P4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 pin schematic: P4.3 to P4.4, input/output with Schmitt trigger Timer_B Output Tristate Logic P4.6/TBOUTH/A15/OA1I3 P4SEL.6 P4DIR.6 ADC10AE1.7 Pad Logic To ADC10 † INCHx = 8+y ADC10AE1.y P4REN.x P4DIR.x 0 0 Module X OUT 1 0 1 1 Direction 0: Input 1: Output 1 P4OUT.x DVSS DVCC P4.3/TB0/A12/OA0O P4.4/TB1/A13/OA1O Bus Keeper P4SEL.x EN P4IN.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 (P4.3 to P4.4) pin functions CONTROL BITS / SIGNALS PIN NAME (P4 (P4.X) X) X Y P4.3/TB0/A12/OA0O 3 4 FUNCTION P4.3† (I/O) Timer_B3.CCI0B P4.4/TB1/A13/OA1O 4 5 P4DIR.x P4SEL.x ADC10AE1.y I: 0; O: 1 0 0 0 1 0 Timer_B3.TB0 1 1 0 A12/OA0O (see Note 3) X X 1 P4.4† (I/O) I: 0; O: 1 0 0 Timer_B3.CCI1B 0 1 0 Timer_B3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 pin schematic: P4.5, input/output with Schmitt trigger Timer_B Output Tristate Logic P4.6/TBOUTH/A15/OA1I3 P4SEL.6 P4DIR.6 ADC10AE1.7 Pad Logic To ADC10 INCHx = 14 ADC10AE1.6 P4REN.5 P4DIR.5 0 0 Module X OUT 1 0 1 P4.5/TB3/A14/OA0I3 Bus Keeper P4SEL.5 EN P4IN.5 EN Module X IN D + OA0 − 74 1 Direction 0: Input 1: Output 1 P4OUT.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 (P4.5) pin functions CONTROL BITS / SIGNALS PIN NAME (P4 (P4.X) X) X Y P4.5/TB3/A14/OA0I3 5 6 FUNCTION P4DIR.x P4SEL.x ADC10AE1.y I: 0; O: 1 0 0 Timer_B3.TB2 1 1 0 A14/OA0I3 (see Note 3) X X 1 P4.5† (I/O) † Default after reset (PUC/POR) NOTES: 1. N/A: Not available or not applicable 2. X: Don’t care 3. Setting the ADC10AE1.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 pin schematic: P4.6, input/output with Schmitt trigger Pad Logic To ADC10 INCHx = 15 ADC10AE1.7 P4REN.6 P4DIR.6 0 0 Module X OUT 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 P4OUT.6 DVSS P4.6/TBOUTH/ A15/OA1I3 Bus Keeper P4SEL.6 EN P4IN.6 EN Module X IN D + OA1 − Port P4 (P4.6) pin functions PIN NAME (P4 (P4.X) X) P4.6/TBOUTH/ A15/OA1I3 CONTROL BITS / SIGNALS X Y 6 7 FUNCTION P4.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Port P4 pin schematic: P4.7, input/output with Schmitt trigger Pad Logic DVSS P4REN.x P4DIR.x 0 P4OUT.x 0 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 Module X OUT DVSS P4.7/TBCLK Bus Keeper P4SEL.x EN P4IN.x EN Module X IN D Port P4 (P4.7) pin functions PIN NAME (P4 (P4.X) X) P4.7/TBCLK CONTROL BITS / SIGNALS X 7 FUNCTION P4.7† (I/O) P4DIR.x P4SEL.x I: 0; O: 1 0 Timer_B3.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 JTAG fuse check mode MSP430 devices that have the fuse on the TEST terminal have a fuse check mode that tests the continuity of the fuse the first time the JTAG port is accessed after a power-on reset (POR). When activated, a fuse check current, ITF , of 1 mA at 3 V, 2.5 mA at 5 V can flow from the TEST pin to ground if the fuse is not burned.
MSP430x22x2, MSP430x22x4 MIXED SIGNAL MICROCONTROLLER SLAS504B − JULY 2006 − REVISED JULY 2007 Data Sheet Revision History Literature Number SLAS504 Summary Preliminary data sheet release. SLAS504A Production data sheet release. Updated specification and added characterization graphs. Updated/corrected port pin schematics. SLAS504B Maximum low-power mode supply current limits decreased. Added note concerning fUCxCLK to USCI SPI parameters.
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PACKAGE OPTION ADDENDUM www.ti.com 20-Jul-2007 OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
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