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MSP430x241x, MSP430x261x

MIXED SIGNAL MICROCONTROLLER

SLAS541 -- JUNE 2007

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Low Supply-Voltage Range: 1.8 V to 3.6 V

D Ultralow Power Consumption:

-- Active Mode: 365 μAat1MHz,2.2V

-- Standby Mode: 0.9 μA

-- Off Mode (RAM Retention): 0.1 μA

D Wake-Up From Standby Mode in Less

Than 1 μs

D 16-Bit RISC Architecture, 62.5-ns

Instruction Cycle Time

D Three-Channel Internal DMA

D 12-Bit A/D Converter With Internal

Reference, Sample-and-Hold, and Autoscan

Feature

D Dual 12-Bit D/A Converters With

Synchronization

D 16-Bit Timer_A With Three

Capture/Compare Registers

D 16-Bit Timer_B With Seven

Capture/Compare-With-Shadow Registers

D On-Chip Comparator

D Four Universal Serial Communication

Interface (USCI) Modules With:

-- Enhanced UART Supporting

Auto-Baudrate Detection (LIN)

-- IrDA Encoder and Decoder

-- Synchronous SPI

-- I

C™

D Supply Voltage Supervisor/Monitor With

Programmable Level Detection

D Brownout Detector

D Bootstrap Loader

D Serial Onboard Programming,

No External Programming Voltage Needed,

Programmable Code Protection by Security

Fuse

D Family Members

†

Include:

-- MSP430F2416:

92KB+256B Flash Memory, 4KB RAM

-- MSP430F2417:

92KB+256B Flash Memory, 8KB RAM

-- MSP430F2418:

116KB+256B Flash Memory, 8KB RAM

-- MSP430F2419:

120KB+256B Flash Memory, 4KB RAM

-- MSP430F2616:

92KB+256B Flash Memory, 4KB RAM

-- MSP430F2617:

92KB+256B Flash Memory, 8KB RAM

-- MSP430F2618:

116KB+256B Flash Memory, 8KB RAM

-- MSP430F2619:

120KB+256B Flash Memory, 4KB RAM

D Availablein80-PinQuadFlatPack(QFP)

and 64-Pin QFP (See Available Options)

D For Complete Module Descriptions, See the

MSP430x2xx Family User’s Guide,

Literature Number SLAU144

†

The MSP430F241x devices are identical to the MSP430F261x

devices, with the exception that the DAC12 modules and the DMA

controller are not implemented.

description

The Texas Instruments MSP430 family of ultralow-power mi crocontrollers consists of several devices featuring

different sets of peripherals targeted for various applications. The architecture, combined with five low-power

modes, is optimized to achieve extended battery life in portable measurement applications. The device features

a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code

efficiency. The calibrated digitally controlled oscillator (DCO) allows wake-up from low-power modes to active

mode in less than 1μs.

The MSP430F261x/241x series are microcontroller configurations with two built-in 16-bit timers, a fast 12-bit

A/D converter, a comparator, dual 12-bit D/A converter, four universal serial communication interface (USCI)

modules, DMA, and up to 64 I/O pins. The MSP430F241x devices are identical to the MSP430F261x devices,

with the exception that the DAC12 and the DMA modules are not implemented.

Typical applications include sensor systems, industrial control applications, hand-held meters, etc.

PRODUCT PRE

IEW

Please be aware that an important notice concerning availab ility, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

C is a trademark of Philips Semiconductors.

PRODUCT PREVIEW information c oncerns produc ts in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.

Summary of content (33 pages)

PAGE 1
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 D Low Supply-Voltage Range: 1.8 V to 3.
PAGE 2
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 AVAILABLE OPTIONS TA --40°C to 105°C PLASTIC 64-PIN LQFP (PM) MSP430F2416TPN† MSP430F2416TPM† MSP430F2417TPM† MSP430F2418TPM† MSP430F2419TPM† MSP430F2616TPM† MSP430F2617TPM† MSP430F2618TPM† MSP430F2619TPM† MSP430F2417TPN† MSP430F2418TPN† MSP430F2419TPN† MSP430F2616TPN† MSP430F2617TPN† MSP430F2618TPN† MSP430F2619TPN† Product Preview PRODUCT PREVIEW † PACKAGED DEVICES PLASTIC 80-PIN LQFP (PN) 2 POST OFFICE BOX 655303 • DAL
PAGE 3
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7 AVCC DVSS1 AVSS P6.2/A2 P6.1/A1 P6.0/A0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P8.7/XT2IN P8.6/XT2OUT pin designation -- MSP430F241x, 80-pin package 1 2 60 59 P7.6 P7.5 P6.4/A4 P6.5/A5 P6.6/A6 P6.7/A7/SVSIN 3 4 5 6 58 57 56 55 P7.4 P7.3 P7.2 P7.1 VREF+ XIN XOUT VeREF+ VREF-/VeREF- 7 8 9 10 11 54 53 52 51 50 P7.0 DVSS2 DVCC2 P5.7/TBOUTH/SVSOUT P5.6/ACLK P1.0/TACLK/CAOUT P1.1/TA0 P1.2/TA1 P1.
PAGE 4
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 P5.6/ACLK P5.5/SMCLK XT2OUT P5.7/TBOUTH/SVSOUT TDO/TDI XT2IN TDI/TCLK TCK TMS P6.0/A0 RST/NMI P6.2/A2 P6.1/A1 DVSS1 AVSS AVCC pin designation -- MSP430F241x, 64-pin package PRODUCT PREVIEW 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DVCC1 P6.3/A3 1 2 48 47 P5.4/MCLK P5.3/UCB1CLK/UCA1STE P6.4/A4 3 46 P5.2/UCB1SOMI/UCB1SCL P6.5/A5 4 45 P5.1/UCB1SIMO/UCB1SDA P6.6/A6 5 44 P5.0/UCB1STE/UCA1CLK P6.
PAGE 5
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 P8.5 P8.4 P8.3 P8.2 P8.1 P8.0 P7.7 AVCC DVSS1 AVSS P6.2/A2 P6.1/A1 P6.0/A0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P8.7/XT2IN P8.6/XT2OUT pin designation -- MSP430F261x, 80-pin package 1 2 3 60 59 58 P7.6 P7.5 P7.4 P6.5/A5/DAC1 P6.6/A6/DAC0 P6.7/A7/DAC1/SVSIN 4 5 6 57 56 55 P7.3 P7.2 P7.1 VREF+ XIN XOUT 7 8 9 54 53 52 P7.0 DVSS2 DVCC2 51 50 49 P5.7/TBOUTH/SVSOUT P5.6/ACLK P5.
PAGE 6
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 P5.5/SMCLK P5.6/ACLK P5.7/TBOUTH/SVSOUT XT2OUT TDO/TDI XT2IN TDI/TCLK TMS TCK RST/NMI P6.0/A0 P6.1/A1 P6.2/A2 AVSS DVSS1 AVCC pin designation -- MSP430F261x, 64-pin package PRODUCT PREVIEW 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DV CC1 1 48 P6.3/A3 2 47 P5.3/UCB1CLK/UCA1STE P6.4/A4 3 46 P5.2/UCB1SOMI/UCB1SCL P6.5/A5/DAC1 P6.6/A6/DAC0 4 5 45 44 P5.1/UCB1SIMO/UCB1SDA P5.0/UCB1STE/UCA1CLK P6.
PAGE 7
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 functional block diagram -- MSP430F241x, 80-pin package XOUT/ XT2OUT 2 2 DVCC1/2 ACLK Oscillators Basic Clock SMCLK System+ MCLK 16MHz CPU 1MB incl. 16 Registers DVSS1/2 Flash RAM 120kB 116kB 92kB 92kB 4kB 8kB 8kB 4kB AVCC AVSS P3.x/P4.x P5.x/P6.x 2x8 4x8 P1.x/P2.x Ports P1/P2 ADC12 12-Bit Ports P3/P4 P5/P6 2x8 I/O Interrupt capability 8 Channels 4x8 I/O P7.x/P8.
PAGE 8
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 functional block diagram -- MSP430F261x, 80-pin package XIN/ XT2IN XOUT/ XT2OUT 2 2 DVCC1/2 ACLK Oscillators Basic Clock SMCLK System+ Flash PRODUCT PREVIEW AVCC RAM 120kB 116kB 92kB 92kB 56kB MCLK 16MHz CPU 1MB incl. 16 Registers DVSS1/2 4kB 8kB 8kB 4kB 4kB ADC12 12-Bit 8 Channels AVSS DAC12 12-Bit 2 Channels Voltage Out P3.x/P4.x P5.x/P6.x 2x8 4x8 P7.x/P8.x 2x8/ 1x16 P1.x/P2.
PAGE 9
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 Terminal Functions TERMINAL 64Pin NO. 80Pin NO. AVCC 64 80 Analog supply voltage, positive terminal. Supplies only the analog portion of ADC12 and DAC12. AVSS 62 78 Analog supply voltage, negative terminal. Supplies only the analog portion of ADC12 and DAC12. DVCC1 1 1 Digital supply voltage, positive terminal. Supplies all digital parts. DVSS1 63 79 Digital supply voltage, negative terminal.
PAGE 10
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 Terminal Functions (Continued) TERMINAL 64Pin NO. 80Pin NO. P4.2/TB2 38 38 I/O General-purpose digital I/O pin/Timer_B, capture: CCI2A/B input, compare: Out2 output P4.3/TB3 39 39 I/O General-purpose digital I/O pin/Timer_B, capture: CCI3A/B input, compare: Out3 output P4.4/TB4 40 40 I/O General-purpose digital I/O pin/Timer_B, capture: CCI4A/B input, compare: Out4 output P4.
PAGE 11
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 Terminal Functions (Continued) TERMINAL † 64Pin NO. 80Pin NO. I/O DESCRIPTION P8.6/XT2OUT 68 O General-purpose digital I/O pin/Output terminal of crystal oscillator XT2 P8.7/XT2IN 69 I General-purpose digital I/O pin/Input port for crystal oscillator XT2. Only standard crystals can be connected.
PAGE 12
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 short-form description CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
PAGE 13
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 operating modes The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request and restore back to the low-power mode on return from the interrupt program.
PAGE 14
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range 0x0FFFF to 0x0FFC0. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence. If the reset vector (0x0FFFE) contains 0x0FFFF (e.g. flash is not programmed) the CPU enters LPM4 after power-up.
PAGE 15
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 special function registers Most interrupt enable bits are collected in the lowest address space. Special-function register bits not allocated to a functional purpose are not physically present in the device. This arrangement provides simple software access. interrupt enable 1 and 2 Address 7 6 00h 5 4 ACCVIE rw--0 3 2 1 0 NMIIE OFIE WDTIE rw--0 rw--0 rw--0 WDTIE Watchdog timer interrupt enable.
PAGE 16
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 interrupt flag register 1 and 2 Address 7 6 5 02h 4 3 2 1 0 NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw--0 rw--(0) rw--(1) rw--1 rw--(0) Interrupt Flag register 1 WDTIFG Set on watchdog-timer overflow or security key violation. Reset on VCC power-on, or a reset condition at the RST/NMI pin in reset mode OFIFG Flag set on oscillator fault PORIFG Power--On interrupt flag. Set on VCC power--up.
PAGE 17
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 MSP430F2416 MSP430F2616 MSP430F2417 MSP430F2617 Size Flash Flash 92KB 0x0FFFF -- 0x0FFC0 0x18FFF -- 0x02100 92KB 0x0FFFF -- 0x0FFC0 0x19FFF -- 0x03100 RAM (Total) Size Extended Size Mirrored Size 4kB 0x020FF -- 0x01100 2kB 0x020FF -- 0x01900 2kB 0x018FF -- 0x01100 8kB 0x030FF -- 0x01100 6kB 0x030FF -- 0x01900 2kB 0x018FF -- 0x01100 Memory Main: interrupt vector Main: code memory Information memory Size Flash 256 Byte
PAGE 18
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 flash memory The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include: D Flash memory has n segments of main memory and four segments of information memory (A to D) of 64 bytes each. Each segment in main memory is 512 bytes in size.
PAGE 19
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 calibration data stored in information memory segment A Calibration data is stored for both the DCO and for ADC12 organized in a tag-length-value structure. Tags used by the ADC calibration tags Name Address Value DCO_30 0x10F6 0x01 DCO frequency calibration at VCC = 3.
PAGE 20
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 digital I/O There are up to eight 8-bit I/O ports implemented—ports P1 through P8: D D D D D D All individual I/O bits are independently programmable. Any combination of input, output, and interrupt conditions is possible. Edge-selectable interrupt input capability for all eight bits of ports P1 and P2. Read/write access to port-control registers is supported by all instructions.
PAGE 21
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 timer_A3 Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Timer_A3 Signal Connections Device Input Signal Module Input Name 12 - P1.
PAGE 22
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 timer_B7 Timer_B7 is a 16-bit timer/counter with seven capture/compare registers. Timer_B7 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B7 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Timer_B3/B7 Signal Connections† Input Pin Number Device Input Signal Module Input Name 43 - P4.
PAGE 23
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 comparator_A+ The primary function of the comparator_A+ module is to support precision slope analog--to--digital conversions, battery-voltage supervision, and monitoring of external analog signals. ADC12 The ADC12 module supports fast, 12-bit analog-to-digital conversions. The module implements a 12-bit SAR core, sample select control, reference generator, and a 16-word conversion-and-control buffer.
PAGE 24
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 peripheral file map PERIPHERAL FILE MAP PRODUCT PREVIEW DMA† DAC12† ADC12 † 24 DMA channel 2 transfer size DMA2SZ 0x01F2 DMA channel 2 destination address DMA2DA 0x01EE DMA channel 2 source address DMA2SA 0x01EA DMA channel 2 control DMA2CTL 0x01E8 DMA channel 1 transfer size DMA1SZ 0x01E6 DMA channel 1 destination address DMA1DA 0x01E2 DMA channel 1 source address DMA1SA 0x01DE DMA channel 1 control DMA
PAGE 25
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 Timer_B7 _ Timer_A3 _ ADC memory-control register15 ADC12MCTL15 0x008F ADC memory-control register14 ADC12MCTL14 0x008E ADC memory-control register13 ADC12MCTL13 0x008D ADC memory-control register12 ADC12MCTL12 0x008C ADC memory-control register11 ADC12MCTL11 0x008B ADC memory-control register10 ADC12MCTL10 0x008A ADC memory-control register9 ADC12MCTL9 0x0089 ADC memory-control register8 ADC12MCTL8 0x0088
PAGE 26
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 PERIPHERAL FILE MAP (CONTINUED) Hardware Multiplier Sum extend SUMEXT 0x013E Result high word RESHI 0x013C Result low word RESLO 0x013A Second operand OP2 0x0138 Multiply signed + accumulate/operand1 MACS 0x0136 Multiply + accumulate/operand1 MAC 0x0134 Multiply signed/operand1 MPYS 0x0132 Multiply unsigned/operand1 MPY 0x0130 Flash control 4 FCTL4 0x01BE Flash control 3 FCTL3 0x012C Flash control 2 F
PAGE 27
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 USCI B1 transmit buffer UCB1TXBUF 0x00DF USCI B1 receive buffer UCB1RXBUF 0x00DE USCI B1 status UCB1STAT 0x00DD USCI B1 I2C Interrupt enable UCB1CIE 0x00DC USCI B1 baud rate control 1 UCB1BR1 0x00DB USCI B1 baud rate control 0 UCB1BR0 0x00DA USCI B1 control 1 UCB1CTL1 0x00D9 USCI B1 control 0 UCB1CTL0 0x00D8 USCI B1 I2C slave address UCB1SA 0x017E USCI B1 UCB1OA 0x017C USCI A1/B1 interrupt enable UC1IE
PAGE 28
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 PERIPHERAL FILE MAP (CONTINUED) Port P4 Port P3 PRODUCT PREVIEW Port P2 Port P1 Special p Functions 28 Port P4 selection P4SEL 0x001F Port P4 resistor enable P4REN 0x0011 Port P4 direction P4DIR 0x001E Port P4 output P4OUT 0x001D Port P4 input P4IN 0x001C Port P3 resistor enable P3REN 0x0010 Port P3 selection P3SEL 0x001B Port P3 direction P3DIR 0x001A Port P3 output P3OUT 0x0019 Port P3 input P3IN
PAGE 29
MSP430x241x, MSP430x261x MIXED SIGNAL MICROCONTROLLER SLAS541 -- JUNE 2007 Data Sheet Revision History Summary Initial Product Preview release PRODUCT PREVIEW Literature Number SLAS541 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.
PAGE 31
MECHANICAL DATA MTQF008A – JANUARY 1995 – REVISED DECEMBER 1996 PM (S-PQFP-G64) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 33 48 49 32 64 17 0,13 NOM 1 16 7,50 TYP Gage Plane 10,20 SQ 9,80 12,20 SQ 11,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040152 / C 11/96 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 32
MECHANICAL DATA MTQF010A – JANUARY 1995 – REVISED DECEMBER 1996 PN (S-PQFP-G80) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 41 60 61 40 80 21 0,13 NOM 1 20 Gage Plane 9,50 TYP 12,20 SQ 11,80 14,20 SQ 13,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040135 / B 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
PAGE 33
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