MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 D Low Supply-Voltage Range, 1.8 V to 3.6 V D Ultralow Power Consumption D D D D D D D D D − Active Mode: 200 μA at 1 MHz, 2.2 V − Standby Mode: 0.7 μA − Off Mode (RAM Retention): 0.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 AVAILABLE OPTIONS PACKAGED DEVICES TA PLASTIC 64-PIN QFP (PM) PLASTIC 64-PIN QFN (RTD/RGC) MSP430C412IPM MSP430C413IPM MSP430F412IPM MSP430F413IPM MSP430F415IPM MSP430F417IPM MSP430C412IRGC MSP430C413IRGC MSP430F412IRTD MSP430F413IRTD MSP430F415IRTD MSP430F417IRTD −40°C to 85°C AVCC DVSS AVSS P6.2 P6.1 P6.0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P1.0/TA0 P1.1/TA0/MCLK P1.2/TA1 P1.3/SVSOUT P1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 AVCC DVSS AVSS1 P6.2 P6.1 P6.0 RST/NMI TCK TMS TDI/TCLK TDO/TDI P1.0/TA0.0 P1.1/TA0.0/MCLK P1.2/TA0.1 P1.3/TA1.0/SVSOUT P1.4/TA1.0 pin designation − MSP430x415, MSP430x417 1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 2 47 3 46 4 45 5 44 6 43 7 42 8 MSP430x415 MSP430x417 9 41 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 functional block diagram − MSP430x412, MSP430x413 DVCC XIN XOUT DVSS AVCC AVSS P1 P4 P3 P2 8 8 Port 1 Port 2 8 I/O Interrupt Capability 8 I/O Interrupt Capability P5 P6 8 8 8 8 Port 3 Port 4 Port 5 Port 6 8 I/O 8 I/O 8 I/O 6 I/O P5 P6 ACLK Oscillators FLL+ SMCLK Flash−F41x ROM−C41x 8KB 4KB MCLK 8 MHz CPU incl.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Terminal Functions − MSP430x412, MSP430x413 TERMINAL NAME NO. I/O DESCRIPTION AVCC 64 Positive terminal that supplies SVS, brownout, oscillator, comparator_A, port 1, and LCD resistive divider circuitry; must not power up prior to DVCC. AVSS 62 Negative terminal that supplies SVS, brownout, oscillator, comparator_A. Needs to be externally connected to DVSS. DVCC 1 Digital supply voltage, positive terminal.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Terminal Functions − MSP430x412, MSP430x413 (Continued) TERMINAL NAME NO. I/O DESCRIPTION P4.0/S9 21 I/O General-purpose digital I/O / LCD segment output 9 (see Note 1) P4.1/S8 20 I/O General-purpose digital I/O / LCD segment output 8 (see Note 1) P4.2/S7 19 I/O General-purpose digital I/O / LCD segment output 7 (see Note 1) P4.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Terminal Functions − MSP430x415, MSP430x417 TERMINAL NAME NO. I/O DESCRIPTION AVCC 64 Positive terminal that supplies SVS, brownout, oscillator, comparator_A, port 1, and LCD resistive divider circuitry; must not power up prior to DVCC. AVSS1 62 Negative terminal that supplies SVS, brownout, oscillator, comparator_A. Needs to be externally connected to DVSS. DVCC 1 Digital supply voltage, positive terminal.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Terminal Functions − MSP430x415, MSP430x417 (Continued) TERMINAL NAME NO. I/O DESCRIPTION P4.0/S9 21 I/O General-purpose digital I/O / LCD segment output 9 (see Note 1) P4.1/S8 20 I/O General-purpose digital I/O / LCD segment output 8 (see Note 1) P4.2/S7 19 I/O General-purpose digital I/O / LCD segment output 7 (see Note 1) P4.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 short-form description CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 operating modes The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request and restore back to the low-power mode on return from the interrupt program. The following six operating modes can be configured by software: D Active mode (AM) − All clocks are active.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 interrupt vector addresses The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh to 0FFE0h. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 special function registers Most interrupt and module enable bits are collected into the lowest address space. Special function register bits that are not allocated to a functional purpose are not physically present in the device. Simple software access is provided with this arrangement.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 memory organization MSP430F412 MSP430F413 MSP430F415 MSP430F417 Size Flash Flash 4KB 0FFFFh to 0FFE0h 0FFFFh to 0F000h 8KB 0FFFFh to 0FFE0h 0FFFFh to 0E000h 16KB 0FFFFh to 0FFE0h 0FFFFh to 0C000h 32KB 0FFFFh to 0FFE0h 0FFFFh to 08000h Information memory Size Flash 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h 256 Byte 010FFh to 01000h Boot memory Size ROM 1KB 0FFFh to 0C00h
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 flash memory The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include: D Flash memory has n segments of main memory and two segments of information memory (A and B) of 128 bytes each. Each segment in main memory is 512 bytes in size.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 peripherals Peripherals are connected to the CPU through data, address, and control buses and can be handled using all instructions. For complete module descriptions, see the MSP430x4xx Family User’s Guide, literature number SLAU056.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 watchdog timer (WDT) The primary function of the WDT module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be configured as an interval timer and can generate interrupts at selected time intervals.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Timer1_A5 (MSP430x415 and MSP430x417 only) Timer1_A5 is a 16-bit timer/counter with five capture/compare registers. Timer1_A5 can support multiple capture/compares, PWM outputs, and interval timing. Timer1_A5 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 peripheral file map PERIPHERALS WITH WORD ACCESS Watchdog Watchdog Timer control WDTCTL 0120h Timer1_A5 _ (MSP430x415 and MSP430x417 only) Timer1_A interrupt vector TA1IV 011Eh Timer1_A control TA1CTL 0180h Capture/compare control 0 TA1CCTL0 0182h Capture/compare control 1 TA1CCTL1 0184h Capture/compare control 2 TA1CCTL2 0186h Capture/compare control 3 TA1CCTL3 0188h Capture/compare control 4 TA1CCT
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS LCD Comparator_A p _ LCD memory 20 LCDM20 0A4h : : : LCD memory 16 LCDM16 0A0h LCD memory 15 LCDM15 09Fh : : : LCD memory 1 LCDM1 091h LCD control and mode LCDCTL 090h Comparator_A port disable CAPD 05Bh Comparator_A control2 CACTL2 05Ah Comparator_A control1 CACTL1 059h Brownout, SVS SVS control register SVSCTL 056h FLL+ Clock
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 peripheral file map (continued) PERIPHERALS WITH BYTE ACCESS (CONTINUED) Port P1 Special p Functions Port P1 selection P1SEL 026h Port P1 interrupt enable P1IE 025h Port P1 interrupt-edge select P1IES 024h Port P1 interrupt flag P1IFG 023h Port P1 direction P1DIR 022h Port P1 output P1OUT 021h Port P1 input P1IN 020h SFR module enable 2 ME2 005h SFR module enable 1 ME1 004h SFR interrupt flag2
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 recommended operating conditions PARAMETER MIN Supply voltage during program execution, VCC (AVCC = DVCC = VCC) (see Note 1) Supply voltage during program execution, SVS enabled and PORON = 1, VCC (AVCC = DVCC = VCC) (see Note 1 and Note 2) Supply voltage during programming of flash memory, VCC (AVCC = DVCC = VCC) 3.6 MSP430x412/413 2.2 3.6 MSP430x415/417 2.0 3.6 MSP430F41x 2.7 3.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) supply current into AVCC + DVCC excluding external current (see Note 1) PARAMETER TEST CONDITIONS Active mode, f(MCLK) = f(SMCLK) = f(DCO) = 1 MHz, f(ACLK) = 32,768 Hz, XTS_FLL = 0 (F41x: Program executes in flash) I(AM) I(LPM2) MAX 160 200 3V 240 300 2.2 V 200 250 3V 300 350 2.2 V 32 45 3V 55 70 2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs − ports P1, P2, P3, P4, P5, and P6 PARAMETER VIT+ Positive going input threshold voltage Positive-going VIT− Negative going input threshold voltage Negative-going Vhys Input voltage hysteresis (VIT+ − VIT−) VCC MIN MAX 2.2 V 1.1 1.5 3V 1.5 1.9 2.2 V 0.4 0.9 3V 0.9 1.3 2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) outputs − ports P1, P2, P3, P4, P5, and P6 PARAMETER VOH VOL TEST CONDITIONS High level output voltage High-level VCC MIN MAX IOH(max) = −1.5 mA, See Note 1 2.2 V VCC−0.25 VCC IOH(max) = −6 mA, See Note 2 2.2 V VCC−0.6 VCC 3V VCC−0.25 VCC IOH(max) = −6 mA, See Note 2 3V VCC−0.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) MSP430x412, MSP430x413 outputs − ports P1, P2, P3, P4, P5, and P6 (see Note A) TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 25 TA = 25°C VCC = 2.2 V P1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) MSP430x415, MSP430x417 outputs − ports P1, P2, P3, P4, P5, and P6 (see Note A) TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 40 TA = 25°C VCC = 2.2 V P2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) wake-up LPM3 PARAMETER TEST CONDITIONS MIN MAX f = 1 MHz td(LPM3) 6 f = 2 MHz Delay time UNIT 6 VCC = 2.2 V/3 V f = 3 MHz μs 6 RAM (see Note 1) PARAMETER TEST CONDITIONS VRAMh MIN CPU halted (see Note 1) MAX 1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Comparator_A (see Note 1) PARAMETER TEST CONDITIONS I(CC) CAON = 1 1, CARSEL = 0 0, CAREF = 0 I(Refladder/RefDiode) CAON = 1, CARSEL = 0, CAREF = 1/2/3 1/2/3, No load at P1.6/CA0 and P1.7/CA1 VCC MIN TYP MAX 2.2 V 25 40 3V 45 60 2.2 V 30 50 3V 45 71 UNIT μA A μA A V(Ref025) Voltage @ 0.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE REFERENCE VOLTAGE vs FREE-AIR TEMPERATURE 650 650 VCC = 2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) POR brownout, reset (see Notes 1 and 2) PARAMETER TEST CONDITIONS MIN TYP td(BOR) dVCC/dt ≤ 3 V/s (see Figure 14) VCC(start) V(B_IT−) Brownout MAX UNIT 2000 μs 0.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) VCC 2 VCC (drop) − V tpw 3V V cc = 3 V Typical Conditions 1.5 1 VCC(drop) 0.5 0 0.001 1 1000 1 ns tpw − Pulse Width − μs 1 ns tpw − Pulse Width − μs Figure 15. VCC(drop) Level With a Square Voltage Drop to Generate a POR/Brownout Signal VCC VCC (drop) − V 2 1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) SVS (supply voltage supervisor/monitor) (MSP430x415, MSP430x417 only) (see Notes 1 and 2) PARAMETER td(SVSR) TEST CONDITIONS MIN dVCC/dt > 30 V/ms (see Figure 17) MAX 150 dVCC/dt ≤ 30 V/ms 2000 td(SVSon) SVSon, switch from VLD=0 to VLD ≠ 0, VCC = 3 V tsettle VLD ≠ 0‡ V(SVSstart) VLD ≠ 0, VCC/dt ≤ 3 V/s
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Software Sets VLD>0:SVS is Active VCC V Vhys(SVS_IT−) (SVS_IT−) V(SVSstart) Vhys(B_IT−) V(B_IT−) VCC(start) Brownout Brownout Region Brownout Region 1 0 td(BOR) SVS out td(BOR) SVS Circuit is Active From VLD > to VCC < V(B_IT−) 1 0 td(SVSon) Set POR 1 td(SVSR) Undefined 0 Figure 17.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) DCO PARAMETER TEST CONDITIONS VCC f(DCOCLK) N(DCO) = 01Eh, FN_8 = FN_4 = FN_3 = FN_2 = 0, D = 2, DCOPLUS = 0, fCrystal = 32.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Sn - Stepsize Ratio between DCO Taps electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 1.17 ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ Max 1.11 1.07 1.06 Min 1 20 27 DCO Tap Figure 20.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) crystal oscillator, LFXT1 oscillator (see Notes 1 and 2) PARAMETER CXIN Integrated load capacitance TEST CONDITIONS VCC MIN OSCCAPx = 0h 0 OSCCAPx = 1h 10 OSCCAPx = 2h 2 2 V/3 V 2.2 Integrated load capacitance 0 OSCCAPx = 1h 10 2 2 V/3 V 2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) flash memory TEST CONDITIONS PARAMETER VCC(PGM/ VCC Program and erase supply voltage MIN TYP 2.7 MAX UNIT 3.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION input/output schematics Port P1, P1.0 to P1.5, input/output with Schmitt trigger Pad Logic CAPD.x P1SEL.x 0: Input 1: Output 0 P1DIR.x Direction Control From Module P1OUT.x 1 0 P1.x 1 Module X OUT Bus keeper MSP430x412, MSP430x413 only P1.0/TA0 P1.1/TA0/MCLK P1.2/TA1 P1.3/SVSOUT P1.4 P1.5/TACLK/ACLK P1IN.x EN D Module X IN P1IE.x P1IRQ.x P1IFG.x Q EN MSP430x415, MSP430x417 only P1.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION Port P1, P1.6, P1.7 input/output with Schmitt trigger Pad Logic Note: Port Function Is Active if CAPD.6 = 0 CAPD.6 P1SEL.6 0: Input 1: Output 0 P1DIR.6 1 P1DIR.6 P1.6/ CA0 0 P1OUT.6 1 DVSS Bus Keeper P1IN.6 EN D unused P1IE.7 EN P1IRQ.07 Interrupt Edge Select Q P1IFG.7 Set P1IES.x P1SEL.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P2, P2.0 to P2.7, input/output with Schmitt trigger P2.0, P2.1 LCDM.5 LCDM.6 P2.2 to P2.5 LCDM.7 0: Port Active 1: Segment xx Function Active P2.6, P2.7 Pad Logic Segment xx P2SEL.x 0: Input 1: Output 0 P2DIR.x Direction Control From Module P2OUT.x 1 0 P2.x 1 Module X OUT MSP430x412, MSP430x413 only P2.0/TA2 P2.1 P2.2/S23 P2.3/S22 P2.4/S21 P2.5/S20 P2.6/CAOUT/S19 P2.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P3, P3.0 to P3.7, input/output with Schmitt trigger LCDM.5 LCDM.6 LCDM.7 P3.2 to P3.7 P3.0, P3.1 0: Port Active 1: Segment xx Function Active Pad Logic Segment xx P3SEL.x 0: Input 1: Output 0 P3DIR.x Direction Control From Module P3OUT.x 1 0 1 Module X OUT P3.x Bus keeper P3.0/S17 P3.1/S16 P3.2/S15 P3.3/S14 P3.4/S13 P3.5/S12 P3.6/S11 P3.7/S10 P3IN.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P4, P4.0 to P4.7, input/output with Schmitt trigger LCDM.5 LCDM.6 LCDM.7 0: Port Active 1: Segment xx Function Active Pad Logic Segment xx P4SEL.x 0: Input 1: Output 0 P4DIR.x Direction Control From Module P4OUT.x 1 0 1 Module X OUT P4.x Bus keeper P4.0/S9 P4.1/S8 P4.2/S7 P4.3/S6 P4.4/S5 P4.5/S4 P4.6/S3 P4.7/S2 P4IN.x EN D Module X IN NOTE: 0 ≤ x ≤ 7 42 PnSEL.x PnDIR.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P5, P5.0, P5.1, input/output with Schmitt trigger LCDM.5 LCDM.6 LCDM.7 0: Port Active 1: Segment Function Active Pad Logic Segment xx or COMx or Rxx P5SEL.x 0: Input 1: Output 0 P5DIR.x Direction Control From Module P5OUT.x 1 0 1 Module X OUT P5.x Bus keeper P5.0/S1 P5.1/S0 P5IN.x EN D Module X IN NOTE: x = 0, 1 PnSEL.x PnDIR.x Direction Control From Module PnOUT.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P5, P5.2 to P5.4, input/output with Schmitt trigger 0: Port Active 1: COMx Function Active Pad Logic COMx P5SEL.x 0: Input 1: Output 0 P5DIR.x Direction Control From Module P5OUT.x 1 0 1 Module X OUT P5.x Bus keeper P5.2/COM1 P5.3/COM2 P5.4/COM3 P5IN.x EN D Module X IN NOTE: 2 ≤ x ≤ 4 PnSEL.x PnDIR.x Direction Control From Module PnOUT.x Module X OUT PnIN.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P5, P5.5 to P5.7, input/output with Schmitt trigger 0: Port Active 1: Rxx Function Active Pad Logic Rxx P5SEL.x 0: Input 1: Output 0 P5DIR.x Direction Control From Module P5OUT.x 1 0 1 Module X OUT P5.x Bus keeper P5.5/R13 P5.6/R23 P5.7/R33 P5IN.x EN D Module X IN NOTE: 5 ≤ x ≤ 7 PnSEL.x PnDIR.x Direction Control From Module PnOUT.x Module X OUT PnIN.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P6, P6.0 to P6.6, input/output with Schmitt trigger P6SEL.x 0: Input 1: Output 0 P6DIR.x Direction Control From Module P6OUT.x 1 0 1 Module X OUT P6.x P6. P6.0 P6. P6.1 P6.2 P6.3 P6. P6.4 P6. P6.5 P6. P6.6 P6IN.x EN Module X IN D NOTE: 0 ≤ x ≤ 6 46 PnSEL.x PnDIR.x Direction Control From Module PnOUT.x Module X OUT PnIN.x Module X IN P6SEL.0 P6DIR.0 P6DIR.0 P6OUT.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P6, P6.7 input/output with Schmitt trigger (MSP430x412/413 only) P6SEL.7 0: Input 1: Output 0 P6DIR.7 Direction Control From Module P6OUT.7 1 0 1 Module X OUT P6.x P6.7 P6IN.7 EN Module X IN D PnSEL.x PnDIR.x Direction Control From Module PnOUT.x Module X OUT PnIN.x Module X IN P6SEL.7 P6DIR.7 P6DIR.7 P6OUT.7 DVSS P6IN.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION port P6, P6.7 input/output with Schmitt trigger (MSP430F415/417 only) SVS VLDx=15 P6SEL.7 P6DIR.7 0 1 0: Input 1: Output Pad Logic 0 P6OUT.7 DVss P6.7/SVSIN 1 Bus Keeper P6IN.7 EN Module X IN D SVS VLDx=15 1 To SVS NOTE: Analog signals applied to digital gates can cause current flow from the positive to the negative terminal.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION JTAG pins (TMS, TCK, TDI/TCLK, TDO/TDI), input/output with Schmitt trigger or output TDO Controlled by JTAG Controlled by JTAG TDO/TDI JTAG Controlled by JTAG DVCC TDI Burn and Test Fuse TDI/TCLK DVCC TMS Test and Emulation Module (F versions only) TMS DVCC TCK TCK RST/NMI Tau ~ 50 ns Brownout TCK POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 G D U S G D U S 49
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 APPLICATION INFORMATION JTAG fuse check mode MSP430 devices that have the fuse on the TDI/TCLK terminal have a fuse check mode that tests the continuity of the fuse the first time the JTAG port is accessed after a power-on reset (POR). When activated, a fuse check current, ITF , of 1.8 mA at 3 V can flow from the TDI/TCLK pin to ground if the fuse is not burned.
MSP430x41x MIXED SIGNAL MICROCONTROLLER SLAS340J − MAY 2001 − REVISED DECEMBER 2008 Data Sheet Revision History Literature Number Summary SLAS340H Updated functional block diagrams (page 4) Clarified test conditions in recommended operating conditions table (page 21) Split Supply voltage during program execution for MSP430x412/413 and MSP430x415/417 (page 21) Clarified test conditions for I(LPM0) in supply current into AVCC + DVCC table (page 22) Added P2−P5 to leakage current table (page 23) Changed tC
Manual Update Sheet SLAZ554 – December 2013 Corrections to MSP430x41x Data Sheet (SLAS340J) Document Being Updated: MSP430x41x Mixed Signal Microcontroller Literature Number Being Updated: SLAS340J Page Change or Add 40 In top left of the figure: LCDM.5 should be changed to bit LCDM.6 should be changed to bit LCDM.7 should be changed to bit 41 In top left of the figure: LCDM.5 should be changed to bit LCDM.6 should be changed to bit LCDM.7 should be changed to bit 42 In top left of the figure: LCDM.
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PACKAGE OPTION ADDENDUM www.ti.com 17-Nov-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE MATERIALS INFORMATION www.ti.com 12-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MSP430F412IPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.0 Q2 MSP430F413IPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.0 Q2 MSP430F415IPMR LQFP PM 64 1000 330.0 24.4 13.0 13.0 2.1 16.0 24.
PACKAGE MATERIALS INFORMATION www.ti.com 12-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MSP430F412IPMR LQFP PM 64 1000 336.6 336.6 41.3 MSP430F413IPMR LQFP PM 64 1000 336.6 336.6 41.3 MSP430F415IPMR LQFP PM 64 1000 336.6 336.6 41.3 MSP430F417IPMR LQFP PM 64 1000 336.6 336.6 41.
MECHANICAL DATA MTQF008A – JANUARY 1995 – REVISED DECEMBER 1996 PM (S-PQFP-G64) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 33 48 49 32 64 17 0,13 NOM 1 16 7,50 TYP Gage Plane 10,20 SQ 9,80 12,20 SQ 11,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040152 / C 11/96 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
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