Datasheet

MSP430F5438A, MSP430F5437A, MSP430F5436A, MSP430F5435A
MSP430F5419A, MSP430F5418A
www.ti.com SLAS655D –JANUARY 2010–REVISED AUGUST 2013
Mixed Signal Microcontroller
Check for Samples: MSP430F5438A, MSP430F5437A, MSP430F5436A, MSP430F5435A, MSP430F5419A, MSP430F5418A
1
FEATURES
23
• Low Supply Voltage Range:
– Low-Frequency Trimmed Internal Reference
3.6 V Down to 1.8 V Source (REFO)
• Ultralow-Power Consumption – 32-kHz Crystals
– Active Mode (AM): – High-Frequency Crystals up to 32 MHz
All System Clocks Active
• 16-Bit Timer TA0, Timer_A With Five
230 µA/MHz at 8 MHz, 3.0 V, Flash Program
Capture/Compare Registers
Execution (Typical)
• 16-Bit Timer TA1, Timer_A With Three
110 µA/MHz at 8 MHz, 3.0 V, RAM Program
Capture/Compare Registers
Execution (Typical)
• 16-Bit Timer TB0, Timer_B With Seven
– Standby Mode (LPM3):
Capture/Compare Shadow Registers
Real-Time Clock With Crystal, Watchdog,
• Up to Four Universal Serial Communication
and Supply Supervisor Operational, Full
Interfaces
RAM Retention, Fast Wake-Up:
– USCI_A0, USCI_A1, USCI_A2, and USCI_A3
1.7 µA at 2.2 V, 2.1 µA at 3.0 V (Typical)
Each Support:
Low-Power Oscillator (VLO), General-
Purpose Counter, Watchdog, and Supply – Enhanced UART Supports Auto-
Supervisor Operational, Full RAM Baudrate Detection
Retention, Fast Wake-Up:
– IrDA Encoder and Decoder
1.2 µA at 3.0 V (Typical)
– Synchronous SPI
– Off Mode (LPM4):
– USCI_B0, USCI_B1, USCI_B2, and USCI_B3
Full RAM Retention, Supply Supervisor
Each Support:
Operational, Fast Wake-Up:
– I
2
C
1.2 µA at 3.0 V (Typical)
– Synchronous SPI
– Shutdown Mode (LPM4.5):
• 12-Bit Analog-to-Digital Converter (ADC)
0.1 µA at 3.0 V (Typical)
– Internal Reference
• Wake Up From Standby Mode in 3.5 µs
(Typical) – Sample-and-Hold
• 16-Bit RISC Architecture – Autoscan Feature
– Extended Memory – 14 External Channels, 2 Internal Channels
– Up to 25-MHz System Clock • Hardware Multiplier Supporting 32-Bit
Operations
• Flexible Power Management System
• Serial Onboard Programming, No External
– Fully Integrated LDO With Programmable
Programming Voltage Needed
Regulated Core Supply Voltage
• Three-Channel Internal DMA
– Supply Voltage Supervision, Monitoring,
and Brownout • Basic Timer With Real-Time Clock Feature
• Unified Clock System • Family Members are Summarized in Table 1
– FLL Control Loop for Frequency • For Complete Module Descriptions, See the
Stabilization MSP430x5xx and MSP430x6xx Family User's
Guide (SLAU208)
– Low-Power Low-Frequency Internal Clock
Source (VLO)
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PRODUCTION DATA information is current as of publication date.
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Products conform to specifications per the terms of the Texas
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necessarily include testing of all parameters.