Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller BGA 80 MicroStar Junior (5x5) 16-Bit 25 MHz I/O number 47

MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526

MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521

MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513

www.ti.com

SLAS590L –MARCH 2009–REVISED MAY 2013

MIXED SIGNAL MICROCONTROLLER

FEATURES

• Low Supply-Voltage Range:

• 16-Bit Timer TA0, Timer_A With Five

3.6 V Down to 1.8 V Capture/Compare Registers

• Ultralow Power Consumption • 16-Bit Timer TA1, Timer_A With Three

Capture/Compare Registers

– Active Mode (AM):

All System Clocks Active • 16-Bit Timer TA2, Timer_A With Three

290 µA/MHz at 8 MHz, 3.0 V, Flash Program Capture/Compare Registers

Execution (Typical)

• 16-Bit Timer TB0, Timer_B With Seven

150 µA/MHz at 8 MHz, 3.0 V, RAM Program

Capture/Compare Shadow Registers

Execution (Typical)

• Two Universal Serial Communication

– Standby Mode (LPM3):

Interfaces

Real-Time Clock With Crystal, Watchdog,

– USCI_A0 and USCI_A1 Each Support:

and Supply Supervisor Operational, Full

– Enhanced UART Supports Auto-

RAM Retention, Fast Wake-Up:

Baudrate Detection

1.9 µA at 2.2 V, 2.1 µA at 3.0 V (Typical)

– IrDA Encoder and Decoder

Low-Power Oscillator (VLO), General-

Purpose Counter, Watchdog, and Supply – Synchronous SPI

Supervisor Operational, Full RAM

– USCI_B0 and USCI_B1 Each Support:

Retention, Fast Wake-Up:

– I

1.4 µA at 3.0 V (Typical)

– Synchronous SPI

– Off Mode (LPM4):

• Full-Speed Universal Serial Bus (USB)

Full RAM Retention, Supply Supervisor

– Integrated USB-PHY

Operational, Fast Wake-Up:

1.1 µA at 3.0 V (Typical) – Integrated 3.3-V and 1.8-V USB Power

System

– Shutdown Mode (LPM4.5):

0.18 µA at 3.0 V (Typical) – Integrated USB-PLL

• Wake-Up From Standby Mode in 3.5 µs – Eight Input, Eight Output Endpoints

(Typical)

• 12-Bit Analog-to-Digital (A/D) Converter

• 16-Bit RISC Architecture, Extended Memory, (MSP430F552x Only) With Internal Reference,

up to 25-MHz System Clock Sample-and-Hold, and Autoscan Feature

• Flexible Power Management System • Comparator

– Fully Integrated LDO With Programmable • Hardware Multiplier Supporting 32-Bit

Regulated Core Supply Voltage Operations

– Supply Voltage Supervision, Monitoring, • Serial Onboard Programming, No External

and Brownout Programming Voltage Needed

• Unified Clock System • Three Channel Internal DMA

– FLL Control Loop for Frequency • Basic Timer With Real-Time Clock Feature

Stabilization

• Family Members are Summarized in Table 1

– Low-Power Low-Frequency Internal Clock

• For Complete Module Descriptions, See the

Source (VLO)

MSP430x5xx and MSP430x6xx Family User's

– Low-Frequency Trimmed Internal Reference Guide (SLAU208)

Source (REFO)

– 32-kHz Watch Crystals (XT1)

– High-Frequency Crystals up to 32 MHz

(XT2)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2MSP430 is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (122 pages)

PAGE 1
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 MIXED SIGNAL MICROCONTROLLER FEATURES 1 • 2 • • • • • Low Supply-Voltage Range: 3.6 V Down to 1.8 V Ultralow Power Consumption – Active Mode (AM): All System Clocks Active 290 µA/MHz at 8 MHz, 3.0 V, Flash Program Execution (Typical) 150 µA/MHz at 8 MHz, 3.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com DESCRIPTION The Texas Instruments MSP430™ family of ultralow-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Functional Block Diagram – MSP430F5529IPN, MSP430F5527IPN, MSP430F5525IPN, MSP430F5521IPN XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS P1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Pin Designation – MSP430F5529IPN, MSP430F5527IPN, MSP430F5525IPN, MSP430F5521IPN 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 P6.3/CB3/A3 P6.2/CB2/A2 P6.1/CB1/A1 P6.0/CB0/A0 RST/NMI/SBWTDIO PJ.3/TCK PJ.2/TMS PJ.1/TDI/TCLK PJ.0/TDO TEST/SBWTCK P5.3/XT2OUT P5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Functional Block Diagram – MSP430F5528IRGC, MSP430F5526IRGC, MSP430F5524IRGC, MSP430F5522IRGC MSP430F5528IZQE, MSP430F5526IZQE, MSP430F5524IZQE, MSP430F5522IZQE MSP430F5528IYFF, MSP430F5526IYFF, MSP430F5524IYFF XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS P1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Pin Designation – MSP430F5528IRGC, MSP430F5526IRGC, MSP430F5524IRGC, MSP430F5522IRGC RST/NMI/SBWTDIO PJ.3/TCK PJ.2/TMS PJ.1/TDI/TCLK PJ.0/TDO TEST/SBWTCK P5.3/XT2OUT P5.2/XT2IN AVSS2 V18 VUSB VBUS PU.1/DM PUR PU.0/DP VSSU RGC PACKAGE (TOP VIEW) P6.0/CB0/A0 P6.1/CB1/A1 P6.2/CB2/A2 P6.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Functional Block Diagram – MSP430F5519IPN, MSP430F5517IPN, MSP430F5515IPN XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS P1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Pin Designation – MSP430F5519IPN, MSP430F5517IPN, MSP430F5515IPN 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 P6.3/CB3 P6.2/CB2 P6.1/CB1 P6.0/CB0 RST/NMI/SBWTDIO PJ.3/TCK PJ.2/TMS PJ.1/TDI/TCLK PJ.0/TDO TEST/SBWTCK P5.3/XT2OUT P5.2/XT2IN AVSS2 V18 VUSB VBUS PU.1/DM PUR PU.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Functional Block Diagram – MSP430F5514IRGC, MSP430F5513IRGC, MSP430F5514IZQE, MSP430F5513IZQE XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS P1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Pin Designation – MSP430F5514IRGC, MSP430F5513IRGC RST/NMI/SBWTDIO PJ.3/TCK PJ.2/TMS PJ.1/TDI/TCLK PJ.0/TDO TEST/SBWTCK P5.3/XT2OUT P5.2/XT2IN AVSS2 V18 VUSB VBUS PU.1/DM PUR PU.0/DP VSSU RGC PACKAGE (TOP VIEW) P6.0/CB0 P6.1/CB1 P6.2/CB2 P6.3/CB3 P6.4/CB4 P6.5/CB5 P6.6/CB6 P6.7/CB7 P5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Pin Designation – MSP430F5528IZQE, MSP430F5526IZQE, MSP430F5524IZQE, MSP430F5522IZQE, MSP430F5514IZQE, MSP430F5513IZQE ZQE PACKAGE (TOP VIEW) P6.0 RST/NMI PJ.2 TEST AVSS2 VUSB VBUS PU.1 PU.0 A1 A2 A3 A4 A5 A6 A7 A8 A9 P6.2 P6.1 PJ.3 P5.3 P5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Pin Designation – MSP430F5528IYFF, MSP430F5526IYFF, MSP430F5524IYFF YFF PACKAGE (TOP VIEW) D H8 H7 P2.7 P3.1 H6 H5 DVSS2 DVCC2 YFF PACKAGE (BALL-SIDE VIEW) H4 H3 H2 H1 H1 H2 H3 H4 P4.1 P4.4 VSSU PU.0 PU.0 VSSU P4.4 P4.1 H5 H6 DVCC2 DVSS2 H7 H8 P3.1 P2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 3. Terminal Functions TERMINAL NAME I/O (1) NO. DESCRIPTION PN RGC YFF ZQE P6.4/CB4/A4 1 5 B2 C1 I/O General-purpose digital I/O Comparator_B input CB4 Analog input A4 – ADC (not available on F551x devices) P6.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 3. Terminal Functions (continued) TERMINAL NAME I/O (1) NO. PN RGC YFF DESCRIPTION ZQE AVSS1 14 14 A4 G2 P8.0 15 N/A N/A N/A I/O Analog ground supply General-purpose digital I/O P8.1 16 N/A N/A N/A I/O General-purpose digital I/O P8.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 3. Terminal Functions (continued) TERMINAL NAME I/O (1) NO. PN RGC YFF DESCRIPTION ZQE P2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 3. Terminal Functions (continued) TERMINAL NAME NO.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 3. Terminal Functions (continued) TERMINAL NAME NO. I/O (1) DESCRIPTION PN RGC YFF ZQE PUR 63 51 G2 B7 I/O USB pullup resistor pin (open drain). The voltage level at the PUR pin is used to invoke the default USB BSL. Recommended 1-MΩ resistor to ground.
PAGE 19
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 SHORT-FORM DESCRIPTION CPU The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Operating Modes The MSP430 has one active mode and six software selectable low-power modes of operation. An interrupt event can wake up the device from any of the low-power modes, service the request, and restore back to the lowpower mode on return from the interrupt program.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Interrupt Vector Addresses The interrupt vectors and the power-up start address are located in the address range 0FFFFh to 0FF80h. The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence. Table 4.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Memory Organization Table 5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Bootstrap Loader (BSL) The BSL enables users to program the flash memory or RAM using various serial interfaces. Access to the device memory by the BSL is protected by an user-defined password.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com JTAG Operation JTAG Standard Interface The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the JTAG signals.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Flash Memory (Link to User's Guide) The flash memory can be programmed through the JTAG port, Spy-Bi-Wire (SBW), the BSL, or in-system by the CPU. The CPU can perform single-byte, single-word, and long-word writes to the flash memory.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port Mapping Controller (Link to User's Guide) The port mapping controller allows the flexible and reconfigurable mapping of digital functions to port P4 (see Table 10). Table 11 shows the default mappings. Table 10.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 11. Default Mapping PIN PxMAPy MNEMONIC INPUT PIN FUNCTION OUTPUT PIN FUNCTION P4.0/P4MAP0 PM_UCB1STE/PM_UCA1CLK USCI_B1 SPI slave transmit enable (direction controlled by USCI) USCI_A1 clock input/output (direction controlled by USCI) P4.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Real-Time Clock (RTC_A) (Link to User's Guide) The RTC_A module can be used as a general-purpose 32-bit counter (counter mode) or as an integrated realtime clock (RTC) (calendar mode).
PAGE 29
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 12.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 13.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 TA0 (Link to User's Guide) TA0 is a 16-bit timer and counter (Timer_A type) with five capture/compare registers. It can support multiple capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com TA1 (Link to User's Guide) TA1 is a 16-bit timer and counter (Timer_A type) with three capture/compare registers. It can support multiple capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 TA2 (Link to User's Guide) TA2 is a 16-bit timer and counter (Timer_A type) with three capture/compare registers. It can support multiple capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com TB0 (Link to User's Guide) TB0 is a 16-bit timer and counter (Timer_B type) with seven capture/compare registers. It can support multiple capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Comparator_B (Link to User's Guide) The primary function of the Comparator_B module is to support precision slope analog-to-digital conversions, battery voltage supervision, and monitoring of external analog signals.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Peripheral File Map Table 18.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 19. Special Function Registers (Base Address: 0100h) REGISTER DESCRIPTION REGISTER OFFSET SFR interrupt enable SFRIE1 00h SFR interrupt flag SFRIFG1 02h SFR reset pin control SFRRPCR 04h Table 20.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 26.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 29.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 31.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 34.
PAGE 42
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 36.
PAGE 43
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 38.
PAGE 44
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 39.
PAGE 45
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 40.
PAGE 46
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 42.
PAGE 47
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 44.
PAGE 48
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 45.
PAGE 49
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 46.
PAGE 50
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) Voltage applied at VCC to VSS –0.3 V to 4.1 V Voltage applied to any pin (excluding VCORE, VBUS, V18) (2) –0.3 V to VCC + 0.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Recommended Operating Conditions Typical values are specified at VCC = 3.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com 25 System Frequency - MHz 3 20 2 2, 3 1 1, 2 1, 2, 3 0, 1 0, 1, 2 0, 1, 2, 3 12 8 0 0 1.8 2.0 2.2 2.4 3.6 Supply Voltage - V The numbers within the fields denote the supported PMMCOREVx settings. Figure 1.
PAGE 53
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Low-Power Mode Supply Currents (Into VCC) Excluding External Current over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) PARAMETER ILPM0,1MHz Low-power mode 0 (3) (4) ILPM2 Low-power mode 2 (5) (4) ILPM4 0 73 77 85 80 85 97 3.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Schmitt-Trigger Inputs – General Purpose I/O (1) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7) (P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Outputs – General Purpose I/O (Reduced Drive Strength) (P1.0 to P1.7, P2.0 to P2.7, P3.0 to P3.7, P4.0 to P4.7) (P5.0 to P5.7, P6.0 to P6.7, P7.0 to P7.7, P8.0 to P8.2, PJ.0 to PJ.
PAGE 56
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TA = 25°C VCC = 3.0 V Px.y 55.0 50.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Crystal Oscillator, XT1, Low-Frequency Mode (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER ΔIDVCC.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Crystal Oscillator, XT2 over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) PARAMETER TEST CONDITIONS VCC MIN fOSC = 4 MHz, XT2OFF = 0, XT2BYPASS = 0, XT2DRIVEx = 0, TA = 25°C IDVCC.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Internal Very-Low-Power Low-Frequency Oscillator (VLO) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC fVLO VLO frequency Measured at ACLK 1.8 V to 3.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 DCO Frequency over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT fDCO(0,0) DCO frequency (0, 0) DCORSELx = 0, DCOx = 0, MODx = 0 0.07 0.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
PAGE 63
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 PMM, SVM High Side over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN SVMHE = 0, DVCC = 3.
PAGE 64
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Wake-Up From Low-Power Modes and Reset over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fMCLK ≥ 4.0 MHz 3.5 7.5 1.0 MHz < fMCLK < 4.0 MHz 4.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.
PAGE 66
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com 1/fUCxCLK CKPL = 0 UCLK CKPL = 1 tLO/HI tLO/HI tSU,MI tHD,MI SOMI tHD,MO tVALID,MO SIMO Figure 11. SPI Master Mode, CKPH = 0 1/fUCxCLK CKPL = 0 UCLK CKPL = 1 tLO/HI tLO/HI tHD,MI tSU,MI SOMI tHD,MO tVALID,MO SIMO Figure 12.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.
PAGE 68
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com tSTE,LEAD tSTE,LAG STE 1/fUCxCLK CKPL = 0 UCLK CKPL = 1 tLO/HI tSU,SI tLO/HI tHD,SI SIMO tHD,SO tVALID,SO tSTE,ACC tSTE,DIS SOMI Figure 13.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.
PAGE 70
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
PAGE 71
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.
PAGE 72
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
PAGE 73
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 REF, External Reference over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VeREF+ Positive external reference voltage input VeREF+ > VREF– and VeREF– (2) 1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
PAGE 75
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Comparator_B over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VCC TEST CONDITIONS VCC Supply voltage MIN TYP 1.8 3.6 1.
PAGE 76
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com TYPICAL LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 90 VCC = 3.0 V TA = 25 ºC IOL - Typical Low-Level Output Current - mA 80 VCC = 3.0 V TA = 85 ºC VCC = 1.8 V TA = 25 ºC 70 60 50 VCC = 1.8 V TA = 85 ºC 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 USB Output Ports DP and DM over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VOH D+, D- single ended USB 2.0 load conditions 2.8 3.6 VOL D+, D- single ended USB 2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
PAGE 79
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Flash Memory over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS DVCC(PGM,ERASE) Program and erase supply voltage MIN TYP 1.8 MAX 3.
PAGE 80
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com INPUT/OUTPUT SCHEMATICS Port P1, P1.0 to P1.7, Input/Output With Schmitt Trigger Pad Logic P1REN.x P1DIR.x 0 From module 1 P1OUT.x 0 From module 1 0 DVCC 1 1 Direction 0: Input 1: Output P1DS.x 0: Low drive 1: High drive P1SEL.x P1IN.x EN To module DVSS P1.0/TA0CLK/ACLK P1.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 49. Port P1 (P1.0 to P1.7) Pin Functions PIN NAME (P1.x) P1.0/TA0CLK/ACLK P1.1/TA0.0 P1.2/TA0.1 P1.3/TA0.2 P1.4/TA0.3 x 0 1 2 3 4 FUNCTION P1DIR.x P1SEL.x P1.0 (I/O) I: 0; O: 1 0 TA0CLK 0 1 ACLK 1 1 I: 0; O: 1 0 TA0.CCI0A 0 1 TA0.0 1 1 I: 0; O: 1 0 TA0.
PAGE 82
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P2, P2.0 to P2.7, Input/Output With Schmitt Trigger Pad Logic P2REN.x P2DIR.x 0 From module 1 P2OUT.x 0 From module 1 0 DVCC 1 1 Direction 0: Input 1: Output P2DS.x 0: Low drive 1: High drive P2SEL.x P2IN.x EN To module DVSS P2.0/TA1.1 P2.1/TA1.2 P2.2/TA2CLK/SMCLK P2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 50. Port P2 (P2.0 to P2.7) Pin Functions PIN NAME (P2.x) P2.0/TA1.1 P2.1/TA1.2 P2.2/TA2CLK/SMCLK P2.3/TA2.0 P2.4/TA2.1 x 0 1 2 3 4 FUNCTION P2.0 (I/O) 0 0 1 TA1.1 1 1 I: 0; O: 1 0 TA1.CCI2A 0 1 TA1.2 1 1 P2.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger Pad Logic P3REN.x P3DIR.x 0 From module 1 P3OUT.x 0 From module 1 DVSS 0 DVCC 1 Direction 0: Input 1: Output P3DS.x 0: Low drive 1: High drive P3SEL.x P3IN.x EN To module 1 P3.0/UCB0SIMO/UCB0SDA P3.
PAGE 85
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger Pad Logic P4REN.x P4DIR.x 0 from Port Mapping Control 1 P4OUT.x 0 from Port Mapping Control 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output P4.0/P4MAP0 P4.1/P4MAP1 P4.2/P4MAP2 P4.3/P4MAP3 P4.4/P4MAP4 P4.5/P4MAP5 P4.
PAGE 86
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger Pad Logic to/from Reference (n/a MSP430F551x) (n/a MSPF430F551x) to ADC12 (n/a MSPF430F551x) INCHx = x P5REN.x P5DIR.x DVSS 0 DVCC 1 1 0 1 P5OUT.x 0 From module 1 P5.0/(A8/VREF+/VeREF+) P5.1/(A9/VREF–/VeREF–) P5DS.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Port P5, P5.2, Input/Output With Schmitt Trigger Pad Logic To XT2 P5REN.2 P5DIR.2 DVSS 0 DVCC 1 1 0 1 P5OUT.2 0 Module X OUT 1 P5DS.2 0: Low drive 1: High drive P5SEL.2 P5.2/XT2IN P5IN.
PAGE 88
MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P5, P5.3, Input/Output With Schmitt Trigger Pad Logic To XT2 P5REN.3 P5DIR.3 DVSS 0 DVCC 1 1 0 1 P5OUT.3 0 Module X OUT 1 P5.3/XT2OUT P5DS.3 0: Low drive 1: High drive P5SEL.3 P5IN.3 Bus Keeper EN Module X IN D Table 54. Port P5 (P5.2, P5.3) Pin Functions PIN NAME (P5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Port P5, P5.4 and P5.5 Input/Output With Schmitt Trigger Pad Logic to XT1 P5REN.4 P5DIR.4 DVSS 0 DVCC 1 1 0 1 P5OUT.4 0 Module X OUT 1 P5DS.4 0: Low drive 1: High drive P5SEL.4 P5.4/XIN P5IN.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Pad Logic to XT1 P5REN.5 P5DIR.5 DVSS 0 DVCC 1 1 0 1 P5OUT.5 0 Module X OUT 1 P5.5/XOUT P5DS.5 0: Low drive 1: High drive P5SEL.5 XT1BYPASS P5IN.5 Bus Keeper EN Module X IN D Table 55. Port P5 (P5.4 and P5.5) Pin Functions PIN NAME (P5.x) P5.4/XIN x 4 FUNCTION P5DIR.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Port P5, P5.6 to P5.7, Input/Output With Schmitt Trigger Pad Logic P5REN.x P5DIR.x 0 From Module 1 P5OUT.x 0 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 P5DS.x 0: Low drive 1: High drive P5SEL.x P5.6/TB0.0 P5.7/TB0.1 P5IN.x EN D To module Table 56. Port P5 (P5.6 to P5.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P6, P6.0 to P6.7, Input/Output With Schmitt Trigger Pad Logic to ADC12 (n/a MSPF430F551x) INCHx = x (n/a MSPF430F551x) to Comparator_B from Comparator_B CBPD.x P6REN.x P6DIR.x 0 0 From module 1 0 DVCC 1 P6DS.x 0: Low drive 1: High drive P6SEL.x P6IN.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 57. Port P6 (P6.0 to P6.7) Pin Functions PIN NAME (P6.x) P6.0/CB0/(A0) x 0 FUNCTION P6.0 (I/O) A0 (only MSP430F552x) CB0 (1) P6.1/CB1/(A1) P6.2/CB2/(A2) P6.3/CB3/(A3) P6.4/CB4/(A4) 1 2 3 4 P6.1 (I/O) (1) X X X 1 I: 0; O: 1 0 0 1 X 1 I: 0; O: 1 0 0 P6.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P7, P7.0 to P7.3, Input/Output With Schmitt Trigger Pad Logic to ADC12 (n/a MSPF430F551x) INCHx = x (n/a MSPF430F551x) to Comparator_B from Comparator_B CBPD.x P7REN.x P7DIR.x 0 0 From module 1 0 DVCC 1 1 Direction 0: Input 1: Output 1 P7OUT.x DVSS P7DS.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 58. Port P7 (P7.0 to P7.3) Pin Functions PIN NAME (P7.x) P7.0/CB8/(A12) x 0 FUNCTION P7.0 (I/O) A12 (2) CB8 (3) P7.1/CB9/(A13) 1 0 1 X 1 0 0 (2) X 1 X X X 1 I: 0; O: 1 0 0 X 1 X X X 1 I: 0; O: 1 0 0 X 1 X X X 1 (1) P7.2 (I/O) (1) (2) (1) P7.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port P7, P7.4 to P7.7, Input/Output With Schmitt Trigger Pad Logic P7REN.x P7DIR.x 0 From module 1 P7OUT.x 0 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output 1 P7DS.x 0: Low drive 1: High drive P7SEL.x P7.4/TB0.2 P7.5/TB0.3 P7.6/TB0.4 P7.7/TB0CLK/MCLK P7IN.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Port P8, P8.0 to P8.2, Input/Output With Schmitt Trigger Pad Logic P8REN.x P8DIR.x 0 from Port Mapping Control 1 P8OUT.x 0 from Port Mapping Control 1 DVSS 0 DVCC 1 1 Direction 0: Input 1: Output P8.0 P8.1 P8.2 P8DS.x 0: Low drive 1: High drive P8SEL.x P8IN.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port PU.0/DP, PU.1/DM, PUR USB Ports PUSEL PUOPE USB output enable PUOUT0 USB DP output VUSB VSSU Pad Logic 0 1 0 PU.0/ DP 1 PUIN0 USB DP input PUIPE . PUIN1 USB DM input PUOUT1 0 USB DM output 1 PU.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 61. Port PU.0/DP, PU.1/DM Output Functions (1) CONTROL BITS (1) (2) PIN NAME PUSEL PUOPE PUOUT1 PUOUT0 PU.1/DM PU.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Port J, J.0 JTAG pin TDO, Input/Output With Schmitt Trigger or Output Pad Logic PJREN.0 PJDIR.0 0 DVCC 1 PJOUT.0 0 From JTAG 1 DVSS 0 DVCC 1 1 PJ.0/TDO PJDS.0 0: Low drive 1: High drive From JTAG PJIN.0 EN D Port J, J.1 to J.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 64. Port PJ (PJ.0 to PJ.3) Pin Functions PIN NAME (PJ.x) x CONTROL BITS/ SIGNALS (1) FUNCTION PJDIR.x PJ.0/TDO 0 (2) I: 0; O: 1 PJ.1 (I/O) (2) I: 0; O: 1 PJ.0 (I/O) TDO (3) PJ.1/TDI/TCLK 1 X TDI/TCLK (3) PJ.2/TMS 2 PJ.2 (I/O) TMS (3) PJ.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com DEVICE DESCRIPTORS (TLV) Table 65 and Table 66 list the complete contents of the device descriptor tag-length-value (TLV) structure for each device type. Table 65.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 65.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 65.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 66.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.com Table 66.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 www.ti.com SLAS590L – MARCH 2009 – REVISED MAY 2013 Table 66.
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MSP430F5529, MSP430F5528, MSP430F5527, MSP430F5526 MSP430F5525, MSP430F5524, MSP430F5522, MSP430F5521 MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513 SLAS590L – MARCH 2009 – REVISED MAY 2013 www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 14-Jul-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Jan-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant MSP430F5513IZQER BGA MI CROSTA R JUNI OR ZQE 80 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q1 MSP430F5514IZQER BGA MI CROSTA R JUNI OR ZQE 80 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q1 MSP430F5515IPNR LQFP PN 80 1000 330.0 24.4 15.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Jan-2014 Device MSP430F5526IZQER MSP430F5527IPNR Package Package Pins Type Drawing BGA MI CROSTA R JUNI OR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ZQE 80 2500 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q1 PN 80 1000 330.0 24.4 15.0 15.0 2.1 20.0 24.0 Q2 LQFP MSP430F5528IYFFR DSBGA YFF 64 2500 330.0 12.4 3.86 3.86 0.69 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Jan-2014 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MSP430F5522IZQER BGA MICROSTAR JUNIOR ZQE 80 2500 338.1 338.1 20.6 MSP430F5524IZQER BGA MICROSTAR JUNIOR ZQE 80 2500 338.1 338.1 20.6 MSP430F5525IPNR LQFP PN 80 1000 367.0 367.0 45.0 MSP430F5526IZQER BGA MICROSTAR JUNIOR ZQE 80 2500 338.1 338.1 20.6 MSP430F5527IPNR LQFP PN 80 1000 367.0 367.0 45.
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MECHANICAL DATA MTQF010A – JANUARY 1995 – REVISED DECEMBER 1996 PN (S-PQFP-G80) PLASTIC QUAD FLATPACK 0,27 0,17 0,50 0,08 M 41 60 61 40 80 21 0,13 NOM 1 20 Gage Plane 9,50 TYP 12,20 SQ 11,80 14,20 SQ 13,80 0,25 0,05 MIN 0°– 7° 0,75 0,45 1,45 1,35 Seating Plane 0,08 1,60 MAX 4040135 / B 11/96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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D: Max = 3.79 mm, Min = 3.73 mm E: Max = 3.79 mm, Min = 3.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.