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3.10 Receive Address Map Offset 1 Register (RAMO1)
3.11 Receive Address Map Size 2 Register (RAMS2)
VLYNQ Port Registers
The receive address map offset 1 register (RAMO1) is used with the receive address map size 1 register
(RAMS1) to translate receive packet addresses to local device configuration bus addresses. The RAMO1
is shown in Figure 18 and described in Table 16 .
Figure 18. Receive Address Map Offset 1 Register (RAMO1)
31 2 1 0
RXADROFFSET1 Reserved
R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 16. Receive Address Map Offset 1 Register (RAMO1) Field Descriptions
Bit Field Value Description
31-2 RXADROFFSET1 0-3FFF FFFFh The RXADROFFSET1 field is used with the receive address map size 1 register (RAMS1)
to determine the translated address for serial data. If the received packet address is less
than the value in RAMS1, the packet address is added to the contents of this register to
obtain the translated address.
1-0 Reserved 0 Reserved.
The receive address map size 2 register (RAMS2) is used to identify the intended destination of inbound
serial packets. The RAMS2 is shown in Figure 19 and described in Table 17 .
Figure 19. Receive Address Map Size 2 Register (RAMS2)
31 2 1 0
RXADRSIZE2 Reserved
R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 17. Receive Address Map Size 2 Register (RAMS2) Field Descriptions
Bit Field Value Description
31-2 RXADRSIZE2 0-3FFF FFFFh The RXADRSIZE2 field is used to determine if receive packets are destined for the second
of four mapped address regions. RXADRSIZE2 is compared with the address contained in
the receive packet. If the received packet address is less than the value in RXADRSIZE2,
the packet address is added to the receive address map offset 2 register (RAMO2) to obtain
the translated address.
1-0 Reserved 0 Reserved.
34 VLYNQ Port SPRUF89 – October 2007
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