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3.16 Receive Address Map Offset 4 Register (RAMO4)
3.17 Chip Version Register (CHIPVER)
VLYNQ Port Registers
The receive address map offset 4 register (RAMO4) is used with the receive address map size 4 register
(RAMS4) to translate receive packet addresses to local device configuration bus addresses. The RAMS4
is shown in Figure 24 and described in Table 22 .
Figure 24. Receive Address Map Offset 4 Register (RAMO4)
31 2 1 0
RXADROFFSET4 Reserved
R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 22. Receive Address Map Offset 4 Register (RAMO4) Field Descriptions
Bit Field Value Description
31-2 RXADROFFSET4 0-3FFF FFFFh The RXADROFFSET4 field is used with the receive address map size 4 register (RAMS4)
to determine the translated address for serial data. If the receive packet address is less
than the value in RAMS4, the packet address is added to the contents of this register to
obtain the translated address.
1-0 Reserved 0 Reserved.
Each chip that has a VLYNQ module on it has a unique device ID associated with it, which is software
readable via the chip version register (CHIPVER). The CHIPVER is shown in Figure 25 and described in
Table 23 .
Figure 25. Chip Version Register (CHIPVER)
31 16 0
DEVREV DEVID
R-0 R-x
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 23. Chip Version Register (CHIPVER) Field Descriptions
Bit Field Value Description
31-16 DEVREV 0-FFFFh Device revision. This field reflects the value of the device revision pins.
15-0 DEVID 0-FFFFh Device ID. See the device-specific data manual for this value.
SPRUF89 – October 2007 VLYNQ Port 37
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