Datasheet

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BLOCK DIAGRAM
DIN+
DIN–
COC+
COC–
50 W 50 W
DCFeedbackStage
LossofSignalDetection
VCC
GND
DOUT+
DISABLE
DOUT–
VAR
LOS
+
–
+
–
TH
+
–
+
–
B0067-02
BandgapVoltage
Referenceand
BiasCurrentGeneration
8dB
GainStage
20dB
GainStage
12dB
GainStage
Peak
Detector
Peak
Detector
HIGH-SPEED DATA PATH
LOSS-OF-SIGNAL DETECTION
ONET1191P
SLLS754 – SEPTEMBER 2006
A simplified block diagram of the ONET1191P is shown in Figure 1 .
This compact, low-power, 11.3-Gbps limiting amplifier consists of a high-speed data path with offset cancellation
(dc feedback), a loss-of-signal detection block using two peak detectors, and a band-gap voltage reference and
bias current generation block.
Figure 1. Simplified Block Diagram of the ONET1191P
The high-speed data signal is applied to the data path by means of the input signal pins, DIN+/DIN–. The data
path consists of a 12-dB input gain stage with 2 × 50- Ω on-chip line-termination resistors, a second gain stage
with 20 dB of gain, and a variable-gain output stage which provides another 8 dB of gain. The amplified data
output signal is available at the output pins DOUT+/DOUT–, which include on-chip 2 × 50- Ω back-termination to
VCC. The output amplitude can be adjusted between 400 mV
pp
and 700 mV
pp
by connecting an external resistor
between the VAR pin and ground (GND).
A dc feedback stage compensates for internal offset voltages and thus ensures proper operation even for very
small input data signals. This stage is driven by the output signal of the second gain stage. The signal is
low-pass filtered, amplified, and fed back to the input of the first gain stage via the on-chip, 50- Ω termination
resistors. The required low-frequency cutoff is determined by an external 0.1 µ F capacitor, which must be
differentially connected to the COC+/COC– pins.
The peak values of the input signal and output signal of the first gain stage are monitored by two peak detectors.
The peak values are compared to a predefined loss-of-signal threshold voltage inside the loss-of-signal
detection block. As a result of the comparison, the LOS signal, which indicates that the input signal amplitude is
below the defined threshold level, is generated.
The threshold voltage can be set within a certain range by means of an external resistor connected between the
TH pin and ground.
2
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