Datasheet

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BAND-GAP VOLTAGE AND BIAS GENERATION
PACKAGE
1
2
3
4
VCC
COC–
VCC
COC+
GND
DIN+
GND
DIN–
12
11
10
9
16
VAR
GND
DISABLE
DOUT+
LOS
DOUT–
TH
GND
15
14
13
5
6
7
8
P0019-05
EP
RGTPACKAGE
(TOP VIEW)
ONET1191P
SLLS754 SEPTEMBER 2006
The ONET1191P limiting amplifier is supplied by a single 3.3-V supply voltage connected to the VCC pins. This
voltage is referred to ground (GND).
On-chip band-gap voltage circuitry generates a reference voltage, independent of supply voltage, from which all
other internally required voltages and bias currents are derived.
For the ONET1191P, a small-footprint, 3-mm × 3-mm, 16-pin QFN package, with a lead pitch of 0,5 mm, is
used. The pinout is shown in Figure 2 .
Figure 2. Pinout of ONET1191P in a 3-mm × 3-mm, 16-Pin QFN Package
TERMINAL FUNCTIONS
TERMINAL
TYPE DESCRIPTION
NAME NO.
Offset cancellation filter capacitor plus terminal. An external 0.1 µ F filter capacitor must be
COC+ 6 Analog
connected between this pin and COC– (pin 5).
Offset cancellation filter capacitor minus terminal. An external 0.1 µ F filter capacitor must be
COC– 5 Analog
connected between this pin and COC+ (pin 6).
Noninverted data input. On-chip, 50- terminated to COC+. Differentially 100- terminated
DIN+ 7 Analog input
to DIN–.
Inverted data input. On-chip, 50- terminated to COC–. Differentially 100- terminated to
DIN– 8 Analog input
DIN+.
DISABLE 11 CMOS input Disables the output stage when set to a high level
DOUT+ 15 CML out Noninverted data output. On-chip, 50- back-terminated to VCC.
DOUT– 14 CML out Inverted data output. On-chip, 50- back-terminated to VCC.
3, 4, 13, 16,
GND Supply Circuit ground. Exposed die pad (EP) must be grounded.
EP
Open-drain High level indicates that the input signal amplitude is below the programmed threshold level.
LOS 10
MOS Open-drain output. Requires an external 10-k pullup resistor to VCC for proper operation.
TH 9 Analog input LOS threshold adjustment with resistor to GND
Variable output amplitude control. Output amplitude can be reduced to 400 mV
pp
by
VAR 12 Analog input grounding the VAR pin. Output amplitude can be set from 400 mV
pp
to 700 mV
pp
by
connecting a 0 to 100-k resistor to GND or leaving the pin open.
VCC 1, 2 Supply 3.3-V ± 10% supply voltage
3
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